The functional block diagram of the HDLC Protocol Controller is shown in Figure l. It has two ports. The serial port transmits and receives formatted data packets and the parallel port provides a microprocessor interface for access to various registers in the Protocol Controller.
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connected to an l/0 pin and can be individually pro- grammed to be a combinatorial input, output or bi-directional I/O pin with 3-state control. The signal levels are TTL compatible voltages and the outputdrivers can source 4 mA or sink 8 mA. Each output can be programmed independently for fast or slow output slew rate to minimize overall output switching noise. Device pins can be safely driven t0 5-Volt signallevels to support mixed-voltage systems.