TIMap-559  > CY7C277-20WC

suppliers of CY7C277-20WC and PDF data of CY7C277-20WC

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  
CY7C277-20WC CYPRESS        5000 
    Shenzhen Shuoshi Technology Co..
  • Contact:mandyz
  • Tel:86-755-83220592
  • Fax:
  • Email: wufeng@szshuoshi.com


CY7C277-20WC CYPRESS      IN STOCK  120 
CY7C277-20WC CY  CDIP  N/A  new original stock  254 
    Shenzhen Ruihe Electronics Co...
  • Contact:Kelvin Lee
  • Tel:86-755-28227909
  • Fax:86-755-82811646
  • Email: ruihe899@163.com
CY7C277-20WC CY  CDIP  06+  100%有货,价格优惠,欢迎来电!  600 
    shenzhen chenglishun electroni..
  • Contact:linna
  • Tel:86-755-83015149
  • Fax:86-755-83015146
  • Email: linna83015149@163.com
CY7C277-20WC CYPRESS    120     
    Century Pioneer Electronics In..
  • Contact:Judy
  • Tel:86-10-88594058
  • Fax:
  • Email: judyic@vip.sina.com
CY7C277-20WC CY  DIP      136 
    TALENT ELECTRONICS TRADING CO.
  • Contact:Hu
  • Tel:86-755-83759092
  • Fax:
  • Email: anne-hu@hotmail.com
CY7C277-20WC CYPRESS  CDIP  07+    500 
    Real Technology Co., Ltd. Shen..
  • Contact:Julia
  • Tel:86-755-83220592
  • Fax:86-755-83226004
  • Email: fine@szshuoshi.com

CY7C277-20WC Datasheet
o o o o o o o - f O ( O C U a D - f ( M L U ) o d u o ! I B d ! s s ! p J a M o d i o l o a l l o ' j
CY7C277-20WC on stock

Pin (SOIC/MSOP/DIP) Name Function
1 NC No internal connections
2 NC No internal connections
3 RESET/RESET Reset Output. RESET is an active LOW, open drain output which goes active whenever Vcc falls below VTRIP. It will remain active until Vcc rises above the VTRIP for tPURST RESET/RESET goes active if the Watchdog Timer is enabled and SDA remains either HIGH or LOW longer than the selectable Watchdog time out period. RESET/RESET goes active on power-uppower-up and remains active for 250ms after the power supply stabilizes. RESET is an active high open drain output. An external pull up resistor is required on the RESET/RESET pin.
4 VSS Ground
5 SDA Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. This pin requires a pull up resistor and the input buffer is always active (not gated).
6 SCL Serial Clock. The Serial Clock input controls the serial bus timing for data input and output.
7 WP Write Protect. WP HIGH prevents writes to any location in the device (including the control register). Connect WP pin to Vss when it is not used.
8 Vcc Supply Voltage


Symbol Parameter Condition Rating Unit Note
Vcc Supply Voltage GND=0V - 0.3^7 V
VTE Voltage Range on Any Pin GND;OV -0.3~Vcc+0.3 V
Pd Power Consumption Power Reduction Rate Ta<250C Ta>250C 1200 11 mW mWfC Mountad on a Bolrd
Topr Operating Temperature 070 oc
Tstg Storage Temperature - 40 v125 oc


Program Counter
Mode *11 *10 *9 *8 *7 *6 *5 4 *3 *2 *1 *o
Initial Reset O 0 O 0 O 0 O O O 0 0 0
External Interrupt 0 O 0 O 0 O 0 O O O 1 0 0
External Interrupt 1 O 0 O 0 O 0 O O 1 0 O 0
Timer/Event Counter o overflow O 0 O 0 O 0 O O 1 1 0 0
Timer/Event Counter l overflow O 0 O 0 O 0 O 1 0 0 0 0
Time Base Interrupt O 0 O 0 O 0 O 1 0 1 0 0
RTC Interrupt O 0 O 0 O 0 O 1 1 0 0 0
Skip PC+2
Loading PCL *11 *10 *9 *8 @7 @6 @5 @4 @3 @2 @1 @0
Jump, Call Branch #11 #10 #9 #8 #7 #6 #5 #4 #3 #2 #1 #0
Return From Subroutine S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 SO