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The gate charge losses produced from the Miller capacitance of MOSFETs are the dominant power dissipation parameter during light load (i.e. < 10 mA). Therefore, less gate switching will improve overall converter efficiency. This is exactly why the Si9166 is designed with pulse skipping mode. If the PWM/PSM pin is connected to logic low level, converter operates in pulse skipping modulation (PSM) mode. During the pulse skipping mode, quiescent current of the controller is decreased to approximately 200 pA, instead of 500 pA during the PWM mode. This is accomplished by turning off most of internal control circuitry and utilizing a simple constant on- time control with feedback comparator. The controller is designed to have a constant on-time and a minimum off-time acting as the feedback comparator blanking time. If the output voltage drops below the desired level, the main switch is first turned on and then off. If the applied on-time is insufficient to provide the desired voltage, the controller will force another on and off sequence, until the desired voltage is accomplished. If the applied on-time forces the output to exceed the desired level, as typically found in the light load condition, the converter stays off. The excess energy is delivered to the output slowly, forcing the converter to skip pulses as needed to maintain regulation. The on-time and off-time are set internally based on inductor used (1.5-pH typical), MODE pin selection and maximum load current. Therefore, with this control method, duty cycle ranging from o to near 100% is possible depending on whether buck or boost is chosen. In pulse skipping mode, synchronous rectifier drive is also disabled to further decrease the gate charge loss and increase overall converter efficiency.
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