| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
LQP10A10NJ02T1M00-01-T265 Datasheet
LQP10A10NJ02T1M00-01-T265 Price NOTES: 1. DIMENSIONS ARE lhl IKICHES[MM]. 2. CONTFROLLiKiC DIMEKISIO~: ihICHES. DIMENSION DOES NOT IKICLLJDE MOLD FLASH OR PROTRUSIONS, EITHER OF WHICH SHALL NO /\ EXCEED 0.008[0 203]. /4\ LC.AD DIMEKISION DOES NOT IKICLUDE DAMBAR PROTRUSION 5 MAXIMt_JM AND MIKlIMUM SPEOFICATIONS ARE: i\ IKIDICATED AS FOLLOWS: MAX/MIKl 6 PACkACE TOP D!ME~SION MAY BE SLICHTLY SMALLER THAN BOTTOM DIMENSION LQP10A10NJ02T1M00-01-T265 on stock Leakage Inductance Transformer leakage inductance (on either the primary or secondary) causes a voltage spike to occur after the output switch (Ql) turn-off. This is increasingly promi- nent at higher load currents, where more stored energy must be dissipated. In some cases a "snubber" circuit will be required to avoid overvoltage breakdown at the MOSFET's drain node. Application Note 19 is a good reference on snubber design. Features 256K x 16 advanced high-speed CMOS Static RAM JEDEC Center Power/ GND pinout for reduced noise. Equal access and cycle times - Commercialand lndustrial: 10/12/15ns One Chip Select plus one Output Enable pin Bidirectional data inputs and outputs directly LVTTL-compatible Low power consumption via chip deselect Upper and Lower Byte Enable Pins Single 3.3V power supply Available in 44-pin, 400 mil plastic SOJ package and a 44- pin, 400 mil TSOP Type lI package and a 48 ball grid array 9mm x9mm package. |
