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MB91126 Datasheet

Pin Name	Pin Function
Ao - A19	Address Inputs
WE	Write Enable
cs	Chip Select
OE	Output Enable
l/0il/04	Data Inputs/Outputs
Vcc	Power(+5.OV)
Vss	Ground
N.C	No Connection

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To take the simple block diagram of Figure 5 and reconfig- ure it to reuse the MS-Flash to do the LS-Flash is con- ceptually simple, but from a hardware point of view is not practical. A new six input switched capacitor comparator is used to accomplish this function in a simple, although not straightforward, manner.
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SYMBOL	PARAMETER	CONDITIONS		MIN TYP MAX	UNITS
VOs	Input Offset Voltage	VCM = V+ VCM = V-	q q	200 700 200 700	ccv
VoS TC	Input Offset Voltage Drift (Note 8)	VCM = V+ VCM = V-	q q	1.5 5 1.5 5	ccWrC ccV/IC
o\/os	Input Offset Voltage Shift	VCM= V- to V+	q	100 700	ccV
lB	Input Bias Current	VCM = V+- O.lV VCM = V- 0.2V	q q	1 5 -14 -5	cCA
CIB	Input Bias Current Shift	VCM = V-+ 0.2V to V+- O.1V	q	6 19
10s	Input Offset Current	VCM = V+- O.lV VCM = V- 0.2V	q q	0.03 0.75 0.05 1.8
ClOs	Input Offset Current Shift	VCM = V-+ 0.2V to V+- O.1V	q	0.08 2.55
AVOL	Large Signal Voltage Gain	Vs = 5V, Vo = 0.5v t0 4.5V, RL = lkl Vs = 5V, Vo = 1V t0 4V, RL = 100 ! Vs = 3V, Vo = 0.5V t0 2.5V, RL = lkl	q q q	75 175 9 20 65 140	\UmV \UmV V/mV
CMRR	Common Mode Rejection Ratio	Vs = 5V, VCM = V- to V+ vs = 3V, VCM = V- to V+	q q	77 94 72 89	dB dB
	Input Common Mode Range		q	v-	V
PSRR	Power Supply Rejection Ratio	Vs = 2.5V t0 10V, VCM = OV	q	89 105	dB
	Minimum Supply Voltage (Note 6)		q	2.3 2.5	V
VOL	Output Voltage Swing LOW (Note 7)	No Load ISINK = 5mA ISINK = 25mA	q q q	8 60 50 150 180 450	mV mV mV
VOH	Output Voltage Swing HIGH (Note 7)	No Load ISOURCE = 5mA ISOURCE = 25mA	q q q	30 80 110 220 370 750	mV mV mV
Isc	Short-Circuit Current	Vs= 5V Vs= 3V	q q	+30 +65 +25 +55	mA mA
Is	Supply Current		q	1 0 14	mA
	Disable Supply Current	Vs = 5V, VSHIJN = OV Vs = 3V, V = OV	q q	0.3 1.1 0.18 0.9	mA mA
GBW	Gain Bandwidth Product	Frequency = 2MHz	q	300	MHz
SR	Slew Rate	Vs = 5V, Av = -1, RL= lk, Vo = 4Vp_p	q	100	V/o:S

Crystal Load Capacitors The device crystal connections should include pads for small capacitors from Xi to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) been the crystal and device. Crystal capacitors must be connected from each of the pins Xl and X2 to ground.

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