| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
MI-P7P-MZV Datasheet
MI-P7P-MZV Price Input jitter tolerance is defined as the peak to peak amplitude of sinusoidal jitter applied on the input signal that causes the equivalent l dB optical/electrical power penalty. This refers to the ability of the device to withstand input jitter without causing a recovered data error. The device has a jitter tolerance that exceeds the mask shown in Figure 3 (GR-253 Figure 5-28). This jitter tolerance is specified using a pseudorandom data pattern of 231 -1. MI-P7P-MZV on stock The inputsignal being converted is integrated fora fixed time period (TSI). Time is measured by counting clock pulses. An opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. The reference integration time is directly proportional to the input signal (TRI). (Figure 2). In a simple dual slope converter a complete conversion requires the integrator output to 'ramp-up' and 'ramp- down'. A simple mathematical equation relates the input signal reference voltage and integration time:
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