MX29F001TTC70 Datasheet| PARAMETER | SYMBOL | MAX | UNIT | | Thermal Resistance: Junction to Ambienti Junction to Ambient2 Junction to Case | Rtritj_amb)i* RtriO_amb;2t RtriO_casel | 175 116 70 | oc/W oc/W oc/W | | | | |
MX29F001TTC70 Price CT Termination Resistor The voltage drop across the CT termination resistor at rated current should be atleast 20mV. The CTs have low phase shift and a ratio ofl:2500. The CT is terminated with a 3.6Q resistor giving a voltage drop of86.4mV across the termination resistor at rated conditions (lmax for the meter). MX29F001TTC70 on stock| Symbol | Description | | VCC | Low side gate driver supply | | VSS | Logic Ground | | HIN | Logic input for high side gate driver outputs (HOP/HON) | | LIN | Logic input for low side gate driver outputs (LOP/LON) | | FAULT/SD | Dual function (in/out) active low pin. Refer to figures 17, 18 and 15. As an output, indicates fault condition. As an input, shuts down the outputs of the gate driver regardless HIN/LIN status. | | SY FLT | Dual function (in/out) active low pin. Refer to figures 17, 18 and 15. As an output, indicates SSD sequence is occurring. As an input, an active low signal freezes both output status. | | FLT CLR | Fault clear active high input. Clears latched fault condition (See figure 17) | | LOP | Low side driver sourcing output | | LON | Low side driver sinking output | | DSL | Low side IGBT desaturation protection input | | SSDL | Low side soft shutdown | | COM | Low side driver return | | VB | High side gate driver floating supply | | HOP | High side driver sourcing output | | HON | High side driver sinking output | | DSH | High side IGBT desaturation protection input | | SSDH | High side soft shutdown | | VS | High side floating supply return | | |
| VEAINl, 2 | Regulated Feedback Voltage at EAIN Pin | (Note 4); ITHl, 2 Voltage = 1.2V | q | 0.792 0.800 0.808 | V | | IEAINl, 2 | Feedback Current | (Note 4) | | -5 -50 | nA | | VREFLNREG | Reference Voltage Line Regulation | VIN = 3.6V t0 30V (Note 4) | | 0.002 0.02 | QN | | VLOADREG | Output Voltage Load Regulation | (Note 4) Measured in Servo Loop; ITHl, 2 Voltage = 1.2V t0 0.7V Measured in Servo Loop; ITHl, 2 Voltage = 1.2V t0 2.OV | q q | 0.1 0.5 - 0.1 - 0.5 | % % | | 9ml, 2 | Transconductance Amplifier 9m | ITHl, 2 = 1.2V; Sink/Source 5ffA; (Note 4) | | 1.3 | mmho | | 9mOLl, 2 | Transconductance Amplifier GBW | ITH1 2 = 1.2V; (9m ' ZL, No Ext Load) (Note 4) | | 3 | MHz | | lQ | Input DC Supply Current Normal Mode Standby Shutdown | (Note 5) EXTVcc Tied to GND; VID Inputs Open Circuit VRUN/SSl, 2 = OV, VSTBYMD > 2V VRUN/SSl, 2 = OV, VSTBYMD = Operi | | 850 125 20 35 | ccA | | VFCB | Forced Continuous Threshold | | q | 0.760 0.800 0.840 | V | | IFCB | Forced Continuous Current | VFCB= 0.85V | | -0.3 -0.18 -0.1 | ccA | | VBINHIBIT | Burst Inhibit Threshold | Measured at FCB pin | | 4.3 4.8 | V | | UVLO | Undervoltage Lockout | VIN Ramping Down | | 3.5 4 | V | | | | | | |
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