| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact | |
| MX29L8100TTC12 | . | . |
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| MX29L8100TTC12 | 2994 |
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MX29L8100TTC12 Datasheet The A-to-D path of the CODEC contains an analog input amplifier with externally configurable gain setting (see application examples in section 11). The device has an input operational amplifier whose output is the input to the encoder section. If the input amplifier is not required for operation it can be powered down and bypassed. In that case a single ended input signal can be applied to the AO pin or the Al- pin. The AO pin becomes high input impedance when the input amplifier is powered down. The input amplifier can be powered down by connecting the Al+ pin to VDD or Vss. The AO pin is selected as an input when Al+ is tied to VDD and the Al- pin is selected as an input when Al+ is tied to Vss (see Table 7.1). MX29L8100TTC12 Price ( ) : 2SB881 Absolute Maximum Ratings at Ta =250C Collector-to-Base Voltage VCBO C ollector-to-E mitter Voltage VCEO Emitter-to-Base Voltage VEBO ColIector Current IC Collector Current (Pulse) ICP Collector Dissipation PC MX29L8100TTC12 on stock FEATURES 1.8V power supply. LVCMOS compatible with multiplexed address. Four banks operation. MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). EMRS cycle with address key programs. . All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation. Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) -. DS (Driver Strength) DQM for masking. . Auto refresh. 64ms refresh period (8K cycle). Commercial Temperature Operation (-250C ~ 700C). Extended Temperature Operation (-250C ~ 850C). 54Balls FBGA with 0.8mm ball pitch ( -RXXX : Leaded, -BXXX : Lead Free).
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