8-bit timer/counter, 2 channels (with timing output) 16-bit capture timer/counter (with timing output) 16-bit timer, 4 channels 8-bit pulse measurement counter, 8-stage FIFO 14-bit, 1 channel 24 factors, 24 vectors, multi-interruption and priority selection possible Sleep/stop 100-pin plastic QFP CXP922000 CXP922032
MX98800AFC on stock| 0 | 0 | WP5 | WP4 | WP3 | WP2 | WP1 | WPO |
| | | (volatile) | | | (LSB) |
| | | | | | | |
| | | LP62S2048A-55LLT | LP62S2048A-70LLT | |
| Symbol | Parameter | Min | Max | Min | Max | Unit |
| Read Cycle |
| tRC | Read Cycle Time | 55 | | 70 | | ns |
| tAA | Address Access Time | | 55 | | 70 | ns |
| tACE1 | Chip Enable Access Time | CE1 | | 55 | | 70 | ns |
| tACE2 | CE2 | | 55 | | 70 | ns |
| tOE | Output Enable to Output Valid | | 25 | | 35 | ns |
| tCLZ1 | | CE1 | 10 | | 10 | | ns |
| tCL22 | Chip Enable to Output in Low Z | CE2 | 10 | | 10 | | ns |
| tOLZ | Output Enable to Output in Low Z | 5 | | 5 | | ns |
| tCHZ1 | Chip Disable to Output in High Z | CE1 | 0 | 20 | 0 | 25 | ns |
| tCH22 | CE2 | 0 | 20 | 0 | 25 | ns |
| tOHZ | Output Disable to Output in High Z | 0 | 20 | 0 | 25 | ns |
| tOH | Output Hold from Address Change | 5 | | 10 | | ns |
| Write Cycle |
| twc | Write Cycle Time | 55 | | 70 | | ns |
| tcw | Chip Enable to End of Write | 50 | | 60 | | ns |
| tAS | Address Setup Time | 0 | | 0 | | ns |
| tAW | Address Valid to End of Write | 50 | | 60 | | ns |
| tWP | Write Pulse Width | 40 | | 50 | | ns |
| tWR | Write Recovery Time | 0 | | 0 | | ns |
| tWHZ | Write to Output in High Z | 0 | 25 | 0 | 25 | ns |
| tDW | Data to Write Time Overlap | 25 | | 30 | | ns |
| tDH | Data Hold from Write Time | 0 | | 0 | | ns |
| tow | Output Active from End of Write | 5 | | 5 | | ns |
| | | | | | | |
