| Parameter | Test Conditions | Min | Typ. | Max | Unit |
| ;ource BVDSS ~:"kdSw Jwn Voltage | VGS = 0 ID = 10mA | 40 | | | V |
| ate Voltage IDSS ~~,,GCatrr urrent | VDS = 12.5V VGS = 0 | | | 2 | mA |
| IGSS Gate Leakage Current | VGS = 20V VDS = 0 | | | 1 | |
| VGS(th) Gate Threshold Voltage* | ID = 10mA VDS = VGS | 0.5 | | 7 | V |
| gfs Forward Transconductance* | VDS = 10V ID = 0.2A | 0.36 | | | S |
| GpS Common Source Power Gain | PO = 5W | 1 0 | | | dB |
| i1 Drain Efficiency | VDS = 12.5V IDQ = 0.2A | 40 | | | % |
| VSWR Load Mismatch Tolerance | f= 1GHz | 201 | | | |
| Ciss Input Capacitance | VDS = OV VGS = -5V f= 1MHz | | | 24 | pF |
| Coss Output Capacitance | VDS = 12.5V VGS = 0 f= 1MHz | | | 20 | pF |
| Crss Reverse Transfer Capacitance | VDS = 12.5V VGS = 0 f= 1MHz | | | 2 | pF |
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SM2 has no effect in Mode 0, and in Mode l can be used to check the validity of the stop bit although this is better done with the Framing Error (FE) flag. In a Mode l reception, if SM2 = 1, the receive interrupt will not be activated unless a valid stop bit is received.
| | | | | | | | 1800 | | |
| | | | 600 | g j | 7' | 7 | | | |
| | | 300 | | | | ij | | | | |
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