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PAL20X8AJ Datasheet
Storage Temperature ............... Ambient Temperature with Power Applied .......... Supply Voltage to Ground Potential (Inputs & Vcc Only) ... Supply Voltage to Ground Potential (Outputs & D/O Only) DC Input Voltage ...... Power Dissipation .....
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VOUT= (VREF'NB/4096)'2 where NB is the numeric value of the DAC's binary input code (0 t0 4095) and VREF iS the reference voltage. The reference input impedance ranges from 14kl (1554 hex) to several gigohms (with an input code of 0000 hex). The reference input capacitance is code depen- dent and typically ranges from 15pF with an input code of all zeros t0 50pF with a full-scale input code.
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Symbol Function
Cl C2 C3 C4 Rl R2 R3 R4 Provides keyboard scanning . a. Keyboard scanning: HKS pin is LOW, the column group stays in "HIGH" stays and row group stays in "LOW" state. The key pad is compatible with the standard dual contact matrix keyboard (as Figure lb.), the inexpensive single contact keyboard (as Figure la.), and electronic input (as Figure lc.). When HKS is "low", a valid key entry is defined by related Row & Column connection or by electronic input; (as show in Figure lc). Activation of two or more keys will result in no response, except for single key. To avoid keyboard bouncing error, this chip provides built-in debounce circuit. (The debounce time = 20 ms.) - -l- - Row _AL Column - Figure la : Single contact form keyboard configuration L Row L Column Figure lb : Dual contact form keyboard configuration - -~D Row - - .VSS - -Y)D Co~umi-I_I _ _ - -' VSS Figure lc : Electronic signalinput keyboard configuration
OSCI OSCO Oscillator input & Oscillator output pins. The 3.579545 MHz oscillator is formed by a built-in inverter inside of this chip and by connecting a 3.579545 MHz crystal or a ceramic resonator across the OSCI and OSCO pins. (built-in feedback resistor and capacitor) When HKS is "low", a valid key-in may turn on this oscillator and generates a 3.579545 MHz clock.
XMUTE Mute output pins. NMOS open drain output structure. The output is in "low" state during dialing sequence (both Pulse and Tone mode) otherwise this pin is "high-impedance" . Long (continue) Mute.
VsS Negative power supply pin.
VDD Positive power supply pin.
HKS Hook switch input pin. When the handset is in ON-HOOK state, this pin must be pulled "high" in order to disable the dialing operation and decrease the power consumption. When in OFF-HOOK state, the HKS pin must be pulled "low" state for all function operation.
PO Pulse output signal pin. NMOS open drain output structure. The output is "low" during Dulse dialing and Flash operation, otherwise this output is "floating".


INPUT 1 INPUT 2 SOURCE 1 SOURCE 2 DIAG NOSTIC
Normal Operation L H L H L H H L L H L H L H H L H H H H
Under-voltage x x L L H
Thermal Shutdown Channel l H x L x L
Channel 2 x H x L L
Open Load Channel l H L X L H L X L L L
Channel 2 X L H L X L H L L L
Output Shorted to Vcc Channel l H L X L H H X L L L
Channel 2 X L H L X L H H L L