PALC22V10-25DMB-40DMB Datasheet| Parameter/Condition | Symbol | Min | Max | Unit | Note | | Input High (Logic l) Voltage, DQ, DQS and DM signals | VIH(AC) | VREF+ 0.31 | | V | 3 | | Input Low (Logic O) Voltage, DQ, DQS and DM signals. | VIL(AC) | | VREF - 0.31 | V | 3 | | Input Differential Voltage, CK and CK inputs | VID(AC) | 0 7 | VDDQ+0.6 | V | 1 | | Input Crossing Point Voltage, CK and CK inputs | VIX(AC) | 0.5'VDD0-0.2 | 0.5'VDDQ+0.2 | V | 2 | | | | | | |
PALC22V10-25DMB-40DMB Price| CABLE | OIMENSIONS IN MM (INCHESJ | | SERIES | D | | 171 | 91 (.036 | | 173 | .91 (.036) | | 178 | .97(.038) | | 179 | 1.02 (.040) | | |
PALC22V10-25DMB-40DMB on stock| TV 5;rj'_':20t | VDD - - | | | Z = 50Q ~ , Ox HSTL | SCOPE oQ | | nrI Kn | | GNI Z = 50Q nOx A, 7 V ~ | | nCLK' (_ -Cross Points - CLKO, CLK1 GND - - | | j | | | | 3.3V CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT | DIFFERENTIAL INPUT LEVEL | | :x>!< × X nOyL tsk,. × X oy - sk(o) I OUTPUT SKEW | tjit(cc) = tcycle n -tcycle n+l 1000 Cycles CYCLE-To-CYCLE JITTER | | nCLKO, i VOH nCLKl)< - CLKO, VOL CLKl I I FBININ -* . -* : I I '\ it(0)1<- tjit(0) = t(0) - t(0) mean = Phase Jitter t(0) mean = Static Phase Offset (where t(0) is any random sample, and t(0) mean iS the average of the sampled cycles measured on controlled edges) PHASE JITTER AND STATIC PHASE OFFSET | 80% 80%\ I Clock Outputs I r<l:- tF I I OUTPUT RISE/FALL TIME | | nOO:n04 _ | nnCCLLKK01, -\ | | 00:04 _1 | [VDDO VDDO 22j Pulse Width - + | Z VDDO | ,LK0 XK CLK1 nOO:nCl4 | | - PERIOD | 010:04 \ | | OUTPUT PULSE WIDTH/PERIOD | I <-tPD PROPAGATION DELAY | | | | | | | | |
| SYMBOL | PARAMETER | MIN | MAX | UNIT | | VR | continuous reverse voltage | | 30 | V | | IF | continuous forward current | | 20 | mA | | Tstg | storage temperature | -55 | +150 | IC | | Ti | operating junction temperature | -55 | +100 | | | | | | |
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