| | Switching Characteristics | Symbol | 35 | 45 | |
| No | Read Cycle | Alt. | IEC | Min | Max | Min | Max | Unit |
| 1 | Read Cycle Timef | tAVAV | tcR | 35 | | 45 | | ns |
| 2 | Address Access Time to Data Validg | tAVQV | ta(A) | | 35 | | 45 | ns |
| 3 | Chip Enable Access Time to Data Valid | tELQV | ta(E) | | 35 | | 45 | ns |
| 4 | Output Enable Access Time to Data Valid | tGLQV | ta(G) | | 1 5 | | 20 | ns |
| 5 | E HIGH to Output in High-Zr' | tEHQZ | tdis(E) | | 1 3 | | 1 5 | ns |
| 6 | G HIGH to Output in High-Zr' | tGHQZ | tdis(G) | | 1 3 | | 1 5 | ns |
| 7 | E LOW to Output in Low-Z | tELQX | ten(E) | 5 | | 5 | | ns |
| 8 | G LOW to Output in Low-Z | tGLQX | ten(G) | 0 | | 0 | | ns |
| 9 | Output Hold Time after Address Change | tAXClX | tv(A) | 3 | | 3 | | ns |
| 1 0 | Chip Enable to Power Activee | tELICCH | tPU | 0 | | 0 | | ns |
| 11 | Chip Disable to Power Standbyd, e | tEHICCL | tPD | | 35 | | 45 | ns |
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