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PALCE16V8H-155C-4 Datasheet
Functional Description The AT25HP256/512 is designed to interface directly with the synchronous serial peripheral interface (SPI) of the 6800 type series of microcontrollers. The AT25HP256/512 utilizes an 8-bit instruction register. The list of instructions and their operation codes are con- tained in Table l. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-low CS transition.
PALCE16V8H-155C-4 Price

BC 546 BC 547 BC 548/549
Collector-Emitter-voltage B open VCEO 65 V 45 V 30V
Collector-Emitter-voltage B shorted VCES 85 V 50V 30V
Collector-Base-voltage E open VCBO 80V 50V 30V
Emitter-Base-voltage C open VEBO 6V 6V SV
Power dissipation - Verlustleistung Ptot 500 mW 11
Collector current - Kollektorstrom (DC) IC 100 mA
Peak Coll. current - Kollektor-Spitzenstrom ICM 200 mA
Peak Base current - Basis-Spitzenstrom IBM 200 mA
Peak Emitter current - Emitter-Spitzenstrom - IEM 200 mA
Junction temp. - Sperrschichttemperatur Tj 150C
Storage temperature - Lagerungstemperatur Ts -65+150C


PALCE16V8H-155C-4 on stock

Svmbol TVDe Name and Funaion
AO -A25 IN PUT ADDRESS INPUTS: AO through A25 enable direct addressing of up t0 64MB ofmemory on the card. Signal AO is not used in word access mode. A25 is the most significant bit. (address pins used are based on card densitv.see Dinout for hi~hest used address Din)
DQO - DQ15 IN PUT/OUT PUT DATA INPU T/O UTPU T: DQO TH ROU GH DQ15 con stitute the bi-directional databus. DQO - DQ 7 constitute the lower (even) byte and DQ 8 - DQ15 the uDDer (odd) bvte. DQ 15 is the MSB.
C E1CE2# IN PUT CARD ENABLE l AND 2: CEl # enables even byte accesses, C E2 # enables odd byte accesses. Multiplexing AO, C El # and C E2 # allow s 8- bit hosts to access all data on DQO - DQ 7.
OE# IN PUT OUTPUT ENABLE: Active low signal enabling read data from the m emorV card.
WE# IN PUT WRITE ENABLE: Active low signal gating write data to the memory card.
RDY/BSY OUTPUT READY/BU SY OUTPUT: N ot used for SRAM cards
CD1CD2# OUTPUT CARD D ETECT l and 2: Provide card insertion detection. These signals are connected to ground internally on the memory card. The host socket interface circuitry shall supply 10K-ohm or larger pull-up resistors on these sianal Dins.
WP OUTPUT W RITE PRO TEC T: Follow s hardware Write Protect Switch. When Switch is placed in on position, signalis pulled high (10K ohm). When switch is off signal is Dulled low.
VPPl, VPP2 NC PRO G RAM/ERA S E POW ER SU PPLY: N ot used for SRAM card s.
VCC CARD POWER SUPPLY: 3.3V / 5.OV for allinternal circuitrv.
GND GROUND: for allinternal circuitrv.
REG IN PUT ATTRIBUTE M EMO RY SELEC T : only used with cards built with oDtional attribute memorV.
RST IN PUT RESET: N ot used for SRAM cards
WAIT OUTPUT WAIT: This signalis pulled high internally for compatibility. N o wait states are generated.
BVDl, BVD2 OUTPUT BATTERY VO LTAG E D ETEC T: Provides status of Battery voltage. BVD2 = BVDl = Voh (battery voltage is guaranteed to retain data) BVD2 = Vol, BVDl = Voh (data is valid, battery recharge required) BVD2 = BVDl = Vol (data may no longer be valid, battery requires extended rechargel
VSl, VS2 OUTPUT VO LTAGE S EN SE: N otifies the host socket of the card's VCC requirements. VSlis grounded and VS2 is open to indicate a 3.3V/5V 16 bit card. with a 5V kev. has been inserted.
RFU RESERVED FOR FUTURE USE
NC NO INTERNA L C O NNEC TIO N TO CARD: pin may be driven or left floatina


l I ^
- IOUT |
__ j l- = 300mA.
j -_ 'uul lour = 150mA
j _ tlrnAl( \ lour = 100n ,ur = 50mA iA
iOUT=lUmA l