PAN401ASI-A2 Datasheet| Parameter | Symbol | Values | Unit | | min | typ. | max | | Forward voltage IF = 100 mA | | | 0.38 | 1.2 | V | | Reverse current VR = 20 V VR = 20 V, TA = 60 0C | | | | 20 200 | nA | | Diode capacitance VR=20 Vf =1 MHz | CT | | 0.75 | 1 | pF | | Forward resistance IF = 5 mA, f = 100 MHz | Vf | | 0.4 | 0.7 | l | | Series inductance | Ls | | 2 | | nH | | | | | | |
PAN401ASI-A2 Price I Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibilty for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. PAN401ASI-A2 on stock| Parameter | Symbol | Maximum Rating | Unit | | Power Dissipation | Pad | 150 | mW | | Continuous Forward Current | If | 80 | mA | | Reverse Voltage | VR | 10 | V | | Operating Temperature Range | Tpr | -40C to+ | OOoC | | Storage Temperature Range | Ttg | -550C to +lOOoC | | Solder temperature l.6 mm from body for 5 seconds at 2600C | | | | |
| | PIN NO. | | | | MNEMONIC | DIP | LCC | TYPE | NAME AND FUNCTION | | vSs vcc P0.0-0.7 P1.O-P1.7 P2.O-P2.7 P3.O-P3.7 RST AI.E FSEN XTAL1 XTAL2 | 20 40 39-32 1-8 21-28 10-17 10 11 12 13 14 15 16 17 9 30 29 31 19 18 | 22 44 43-36 2-9 24-31 11, 13-19 11 13 14 15 16 17 18 19 10 33 32 35 21 20 | I I uo uo uo uo I o I I I I o o I uo o I I o | Ground: OV reference. Power Supply: This is the power supply voltage for normal,ldle, and power-down operation. Port O: Port O is an open drain, bidirectional I/O port. Port O pins that have ls written to them float and can be used as high-impedance inputs. Port O is also the multiplexed low-order address and data bus during accesses to extemal program and data memory. In this applicabon, it uses strong internal pull-ups when emitting ls. Port l: Port l is an 8-bit bidirectional I/O port with intemal pull-ups. Port l pins that have ls wntten to them are pulled high by the intemal pull-ups and can be used as inputs. As inputs, port l pins that are extemally pulled low will source current because of the intemal pull-ups. (See DC Electrical Characteristics: iiD. Port 2: Port 2 is an 8-bit bidirectional UO port with intemal pull-ups. Port 2 pins that hava ls written to them are pulled high by the intemal pull-ups and can be used as inputs. As inputs, port 2 pins that are extemally being pulled low will source current because of the intemal pull-ups. (See DC Electrical Characteristics:IIL). Port 2 emits the high-order address byte during fetches from extemal program memory and during accesses to extemal data memory that use 16-bit addresses (MOVX ODPTR).ln this applicabon, rt uses strong intemal pull-ups when emiffing ls. Dunng accesses to extemal data memory that use 8-bit addresses (MOV@ Ri), port 2 emits the contents of the P2 special function register. Port 3: Port 3 is an 8-bit bidirectonal I/O port with intemal pull-ups. Port 3 pins that have ls written to them are pulled high by the intemal pull-ups and can be used as inputs. As inputs, port 3 pins that are extemally being pulled low will source current because of the pull ups. (See DC Electrical Characteristcs: IlL). Port 3 also se~es tha special faatures of the 80C51 family, as listed below: RxD (P3.0): Serialinput port TxD (P3.1): Senal output port INTO (P3.2): External interrupt fNTf (P3.3): External interrupt TO (P3.4): T*mer O externalinput T1 (P3.5): T*mer l extemalinput WR (P3.6): Extemal data memory write stroba f (P3.7): Extemal data memory read strobe Reset: A high on this pin for two machine cycles while the oscator is running, resets the device. An intemal diffused resistor to Vss permits a power on resat using only an extemal capacitor to vcc. Address Latch Enable: Output pulse forlatching the low byte of the address dunng an accass to axtemal memory. In normal operation, ALE is emitted at a constant rate of l/6 the oscillator frequency, and can be used for external timing or clocking. Note that one ALE pulse is skippad during each access to extemal data memory. executngScode_PgENeeextemaleprogrambmemory.a'ppisgactivatedy,wi,enea'h:m~a~J~TSEk~ iscnot activatedPduringtfetchessfrom intemal programememory.ess to extemal data mf External Access Enable:E must be extemally held low to enable the device to fetch code from internalpprogrammmemorylunlessntheOprogramOcounter containsean addresshgreaterethancOFFFH.rom Crystal l: Input to the inverting oscillator amplifier. circuits.: Output from the inverting oscillator amplifier and input to the internal clock generator | | | | | |
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