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Q67120-D1010 Datasheet
The Idle mode stops the CPU while allowing the other chip function to continue functioning. The Power-down mode allows the voltage regulator, battery protection, regulator current detection, Watchdog Timer, and Wake-up Timer to operate, while disabling all other chip functions until the next Interrupt or Hardware Reset. In Power-save mode, the Wake-up Timer and Coulomb Counter ADC continues to run.
Q67120-D1010 Price

MODE VPP Vcc CE OE PGM Ag I/O
Read Vcc Vcc VIL VIL VIH X1 DOUT
Output Disable Vcc Vcc VIL VIH VIH X High-Z
Standby Vcc Vcc VIH X X X High-Z
Program VPP Vcc VIL VIH VIL X DIN
Program Verify VPP Vcc VIL VIL VIH X DOUT
Page Data Latch VPP Vcc VIH VIL VIH X DIN
Page Program VPP Vcc VIH VIH VIL X High-Z
Program Inhibit Vcc Vcc VIL VIL VIL X High-Z
VPP Vcc VIL VIH VIH X High-Z
VPP Vcc VIH VIL VIL X High-Z
VPP Vcc VIH VIH VIH X High-Z
Identifier Vcc Vcc VIL VIL VIH VH2 lD


Q67120-D1010 on stock
! The products described in this document are subject to foreign exchange and foreign trade control laws. O The information contained herein is presented only as a guide _for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights o+-the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. O TLe information contained herein is subject to change without notice.

OUT (1V/div)
POK (1V/div)
EN (1V/div)