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QA9800       stock  12 

QA9800 Datasheet

lr= 5A
VR: 390V Tj:125'C Tj: 25'C


QA9800 Price
Sending the WREN op-code causes the internal Write Enable Latch to be set. A flag bit in the status register, called WEL, indicates the state of the latch. WEL=1 indicates that writes are permitted. Attempting to write the WEL bit in the status register has no effect. Completing any write operation will automatically clear the write-enable latch and prevent further writes without another WREN command. Figure 5 below illustrates the WREN command bus configuration.
QA9800 on stock

Characterristic Symbol Test Condition Min Typ Max Unit
Collector Base Breakdown Voltage Collector Emitter Breakdown Voltage Emitter Base Breakdown Voltage Collector Cutoff Current Emitter Cutoff Current *DC Current Gain DC Current Gain Collector- Emitter Saturation Voltage BVCBO BVCEO BVEBO ICBO IEBO hFEl hFE2 VCE(sat) IC=-10 mA IE=O IC=-5 mA RBE= IE=-4mA IC=O VCB=-100V IE=O VEB=-4V IC=O VCE=-5V IC=-1A VCE=-5V IC=-5A IC=-10A IB=-1A -200 -200 -6 55 50 -0.1 -0.1 160 -3.0 V V V mA mA V


VBE). This allows the shutdown pin to be driven directly by 5V logic or by open collector logic with a pull-up resistor. The pull-up resistor is only required to supply the leakage current ofthe open collector gate, normally several micro- amperes. Pull-up current must be limited to a maximum of 5mA. A curve of the shutdown pin input current as a function of voltage appears in the Typical Performance Characteristics. If the shutdown pin is not used it can be left open circuit. The device will be active (output on) if the shutdown pin is not connected.