Becausethe ADJ pin is relatively high impedance (depend- ing on the resistor divider used), stray capacitance at this pin can introduce significant phase shift in the error amplifier loop. The PCB layout should be designed to absolutely minimize the capacitance seen at the ADJ pin. To ensure stability over all operating conditions when utilizing large divider resistors, it may be necessary to use a small ceramic feedforward capacitor(lOOOpF) in par- allel with the upper divider resistor (see CFF in Fig u re 2). As an added bonus, this capacitor will improve transient response.
| ¨o Monito @ @ @ C ~_C~ | OSCIN VDD OSCOUT SW10UT FOUT SW11N SCTL SOUT+ RESET SOUT- AMPOUT SW21N AMPIN SW20UT VSS DOUT |
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