RNR55C3920FS Datasheet| Parameter | Description | Conditions | Min | Typ. | Max | Units | | Fmax | Input Frequency | | | | | 200 | MHz | | tPD | PECL_CLK to Q Delay[5, 6, 11] | VDD = 3.3V | tPHL | 2.0 | | 3.2 | ns | | <1 =150 MHz | 850C | tPLH | 2.1 | | 3.4 | | VDD = 3.3V | tPHL | 1.9 | | 3.1 | | 700C | tPLH | 2.0 | | 3.2 | | VDD = 2.5V | tPHL | 2.5 | | 5.2 | | 850C | tPLH | 2.6 | | 5 | | VDD = 2.5V | tPHL | 2.5 | | 5 | | 700C | tPLH | 2.6 | | 5 | | tPD | LVCMOS to Q Delay[5, 6, 11] | VDD = 3.3V | tPHL | 1.9 | | 3 | ns | | <1 =150 MHz | 850C | tPLH | 2.0 | | 3.2 | | VDD = 3.3V | tPHL | 1.8 | | 2.9 | | 700C | tPLH | 1.8 | | 3.1 | | VDD = 2.5V | tPHL | 2.5 | | 4 | | 850C | tPLH | 2.5 | | 4 | | VDD = 2.5V | tPHL | 2.3 | | 3.8 | | 700C | tPLH | 2.3 | | 3.8 | | tJ | Total Jitter | VDD = 3.3V @ 150MHz | | | | 10 | ps | | FoutDC | Output Duty Cycle[5, 6,7J | FCLK < 134 MHz | 45 | | 55 | % | | FCLK > 134 MHz | 40 | | 60 | | Tskew | Output-to-Output Skew[5, 6] | VDD= 3.3V | | | 150 | ps | | VDD= 2.5V | | | 200 | | Tskew(PP) | Part-to-Part Skew[9] | PECL, VDDC = 3.3V | | | 1.4 | ns | | PECL, VDDC = 2.5V | | | 2.2 | | Tskew(PP) | Part-to-Part Skew[9] | TCLK, VDDC = 3.3V | | | 1.2 | ns | | TCLK, VDDC = 2.5V | | | 1.7 | | Tskew(PP) | Part to Part Skew[1 0J | PECL CLK | | | 850 | ps | | TCLK | | | 750 | | tR/tF | Output Clocks Rise/Fall Time[5, 6l | 0.7V t0 2.OV, VDDC = 3.3V | 0.3 | | 1.1 | ns | | 0.5V t0 1.8V, VDDC = 2.5V | 0.3 | | 1.2 | | | | | | | | |
RNR55C3920FS Price| | 1 | L | | | | | | RMS VALUE OF Ctl ODO TCCT UU I | | | | 1' | | | | | | - CURREn | T SET EOUAL- | | | | | '- | -- | | | | TO' | 0% OF l | | | | | | | | j | | 1N3t | II 1 5B | | | | | | - 1'- | | 1 | | | | | | | | | | | | | | | | | | | | I | | | | | | | | | | | ' | | | | 1N3005B | | | | | | | | | | | | | | | | | | j | L | ' | -- ' | - _- | | 1' | | | | | | | | | | L | | | 1_- | 1N2991B | | | | | | | | | L | | | | | | | | | | | | | | 1' | | - NN.. | 1N2c | 84[ | i | | | | | | | | | | | | | | |
RNR55C3920FS on stock| lSymbol | Parameter | Multiwatt | SIP | Unit l | | l Rth j-amb | Thermal Resistance Junction-ambient Max. | 38 | 50 | YC/W l | | l Rtri j_case | Thermal Resistance Junction-case Max. | 3 | 10 | Yc/w l | | | | | |
. Method of selecting output resistance The CXD2073S has a built-in current output-type D/A converter. To obtain the output voltages, connect resistors to AYO and ACO pins. VFS =IFS x R Here, VFS is output full-scale voltage, IFS is output full-scale current, and R is the output resistance connected to each l0. In addition, connect a resistance of 16 times the output resistor to the reference current pin IRF. In the case where the value comes to be impractical, use a value of resistance as close to the value calculated as possible. At that time, VFS = VRF x 16 x R/R'. R is the output resistance connected to each l0, R' is the resistance connected to IRF, and VRF is the VRF pin voltage. Power consumption can be reduced by using higher resistance values, but then glitch energy and data settling time increase contrastingly. Select optimum resistance values according to the system applications. In case of the circuit above, VFS = 2 [V] x 16 x 0.2k/3.3k1.93 [V], IFS = 1.93/0.2k9.65 [mA].
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