| | | | Limits | |
| Symbol | Parameter | Test conditionf | Min | Typ | Max | Unit |
| CifA1 | Input capacitance, address inputs | Vi=Vss | | | 5 | pF |
| Ci (CLK) | Input capacitance, clock inputs | f=lMHz | | | 7 | pF |
| Ci0 | Input/Output capacitance, data ports | V1=25mVrms | | | 7 | pF |
| | | | | | |
Program Memory Interface The on-chip program memory address bus (PMA) and on-chip program memory data bus (PMD) are multiplexed with the on- chip data memory buses (D MA, DMD), creating a single external data bus and a single external address bus. The external data bus is bidirectional and is 24 bits wide to allow instruction
