ROV14E241K-S-2 Datasheet| SINE-WAVEINPUT .tl: : 4 5.t | | | | | | | | | | | ZyF. uF | r= | l | F | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | L ' | | | | | 1 | | | | | __ II II | q it il r r ii I I II | | | | | | | | | | | l | | | | | | | | | | | | | | | | | | | |
ROV14E241K-S-2 Price| Frequency | Cas Latency | tRC | tRFC | tRAS | tRCD | tRP | tRRD | tDAL | Unit | | 275MHz ( 3.6ns ) | 3 | 15 | 17 | 1 0 | 5 | 5 | 2 | 8 | tCK | | 250MHz ( 4.Ons ) | 3 | 14 | 16 | 9 | 5 | 5 | 2 | 8 | tCK | | 200MHz ( 5.Ons ) | 3 | 12 | 14 | 8 | 4 | 4 | 2 | 7 | tCK | | 166MHz ( 6.Ons ) | 3 | 10 | 12 | 7 | 3 | 3 | 2 | 6 | tCK | | | | | | | | | | |
ROV14E241K-S-2 on stock| Forward Transfer Admittance (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) | IYfs | 3.0 | | 6.5 | mmhos | | Output Admittance (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) | IYosl | | 40 | | ymhos | | Forward Transfer Admittance (VDS = 15 Vdc, VGS = 0, f = 200 MHz) | IYfs | | 5 6 | | mmhos | | Reverse Transfer Admittance (VDS = 15 Vdc, VGS = 0, f = 200 MHz) | IYrsI | | 1 0 | | mmhos | | Input Capacitance (VDS = 20 Vdc, -VGS = 1.0 Vdc) | Ciss | | 3 0 | | pF | | Reverse Transfer Capacitance (VDS = 20 Vdc, -VGS = 1.0 Vdc, f = 1.0 MHz) | Crss | | 0 7 | | pF | | Output Capacitance (VDS = 20 Vdc, -VGS = 1.0 Vdc, f = 1.0 MHz) | coss | | 0 9 | | pF | | Cut-off Frequency (Note l) (VDS = 15 Vdc, VGS = 0) | F(Yfs) | | 700 | | MHz | | | | | | |
Dual Accessing: Finally, the DP8422A has all the features previously men- tioned and unlike the DP8420A/21A, the DP8422A has a second port to allow a second CPU to access the same memory array. The DP8422A has four signals to support Dual Accessing, these signals are A ATA~KB, LOCK and GRANTB. All arbitration for the two ports and refresh is done on chip by the controller through the insertion of wait states. Since the DP8422A has only one input address bus, the address lines must be multiplexed externally. The signal GRANTB can be used for this purpose.
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