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RP18452G1 Datasheet

Package Tolerance
0.5% 1% 2%
SOT-23 B3431AK3 B3431BK3 B3431CK3


RP18452G1 Price

TEST
tf Peak Value lpp _ _ WAVEFORM
PARAMETERS
t, = 8lJs
| e'f td = 20ps
|
|
| 7j
|
| td=t 1__/2
|
7


RP18452G1 on stock

SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
tSUCSWE Setup time NCS low before positive NWE edge 13 ns
LSUDWE Data ready before positive NWE edge 9 ns
tHD Data hold after positive NWE edge O ns
tSUA Setup time for address bits AO, A1 17 ns
tHA Address hold after positive NWE edge O
tSUWELD Positive NWE edge before NLDAC low O ns
tWWE High pulse width of NWE 10 ns
tWLD Low pulse width of NLDAC 10 ns


Symbol Description(i) Min Max Unit
tR,tF Maximum in put rise and fall time, 0.8V t0 2V(2) 10 nsN
tPWC Input clock pulse, HIGH or LOW(2) 2 ns
DH Inputdutycycle(2) 10 90 %
fosc XTALoscillatorfrequency 40 MHz
fIN Inputfrequency(2) 50/N 160/N MHz