| Symbol | Rating | Value | Unit |
| Vcc | Power Supply Voltage | -0.5 to +6.0 | V |
| VIN | Input Voltage | -0.5 to Vcc +0.5 | V |
| IOUT | LVDS Output Current | +10% | mA |
| TA | Operating Temperature Range | -40 to +85 | ][c |
| Tstore | Storage Temperature Range | -65 to +150 | ][C |
| | | |
PCM data is shifted into the Decoder's Receive PCM Registervia the DRO or DRl pin duringthe se- lected time-slot on the 8 falling edges of BCLK. The Decoder consists of an expanding DAC with either A or ~255 law decoding characteristic, which is se- lected by the same controlinstruction used to select the Encode law during initialization. Following the Decoderis a 5thorderlow-pass switched capacitor filter with integral Sin x/x correction for the 8 kHz sample and hold. A programmable gain amplifier, which must be set by writing to the Receive Gain
