| May 1995 PAIRCHILD Revised March 2001 SEMICONDUCTOF~Th/ 74LCX543 Low Voltage Octal Registered Transceiver with 5V Tolerant Inputs and Outputs General Description Features The LCX543 is a non-inverting octal transceiver containing s 5V tolerant inputs and outputs two sets of D-type registers for temporary storage of data s 2.3V - 3.6V Vcc specifications provided flowing in either direction. Separate Latch Enable and Out- put Enable inputs are provided for each register to permit s 7.0 ns tPD max (Vcc = 3.3V), 10 ccA Icc max independent input and output control in either direction of s Power down high impedance inputs and outputs data flow. s Supports live insertion/withdrawal (Note l) The LCX543 is designed for low voltage (2.5V or 3.3V) Vcc s +24 mA Output Drive (Vcc = 3.OV) applications with capability of interfacing to a 5V signal s Implements patented noise/EMlreduction circuitry environment. .L s Latch-up performance exceeds 500 mA The LCX543 is fabricated with an advanced CMOS tech- nology to achieve high speed operation while maintaining s ESD performance: CMOS low power dissipation. Human body model > 2000V Machine model > 200V Note l: To ensure the high-impedance state during power up or down, OE should be tied to Vcc through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver Ordering Code: |
| Order Number | Package Number | Package Description |
| 74LCX543WM | M24B | 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-01 3, 0.300 Wide |
| 74LCX543MSA | MSA24 | 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE 11, 5.3mm Wide |
| 74LCX543MTC | MTC24 | 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC M0-153, 4.4mm Wide |
| Devices also available n Tape and Reel Specify by appending the suffix letter "X" to the ordering code Connection Diagram Pin Descriptions |
| | 24 | - vcc | Pin Names | Description | |
| OEBA - AO - A - A2 - A4 A5 - A6 - A7 - CEAB - GND- | 23 22 21 20 19 18 17 16 10 15 11 14 12 13 | - BO -2 - B4 B5 -B6 | OEAB OEBA CEAB CEBA LEAB LEBA AO-A7 BO-B7 | A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-STATE Outputs B-to-A Data Inputs or A-to-B 3-STATE Outputs |
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