The BD_SEL# pins are the last inputs to be driven to their true state. In most systems these will most likely be driven to ground when the short pins are mated. This would indicate the card is fully inserted and the power-up sequence can begin. If, however, the design is based on high availability requirements, the two pins can be ac- tively driven by the host or combined with a switch input indicating the ejector handles are fully engaged.
| Characteristics | Symbol | CD D11210 | CD D11610 | U nits |
| Peak Reverse Blocking Voltage | VRRM | 1200 | 1600 | Volts |
| Transient Peak Reverse Blocking Voltage (Non-Repetitive), t < 5ms | VRSM | 1350 | 1700 | Volts |
| DC Reverse Blocking Voltage | VR(DC) | 960 | 1280 | Volts |
| RMS On-State Current | oF(RMS) | 155 | 155 | Amperes |
| Average On-State Current, TC = 870C | IF(AV) | 100 | 100 | Amperes |
| Peak One-Cycle Surge (Non-Repetitive) On-State Current (60Hz) | oFSM | 2000 | 2000 | Amperes |
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