TIMap-10  > SI9112-DEMOBOARD SI9112-DEMOBOARD SI9112DEMOBOARD

suppliers of SI9112-DEMOBOARD SI9112-DEMOBOARD SI9112DEMOBOARD and PDF data of SI9112-DEMOBOARD SI9112-DEMOBOARD SI9112DEMOBOARD

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  

SI9112-DEMOBOARD SI9112-DEMOBOARD SI9112DEMOBOARD Datasheet

T( oo( c dll -/dt = 200A/c6
j __
to __ -
th
0.5 1 IF, FORWARD CURRENT (A)


SI9112-DEMOBOARD SI9112-DEMOBOARD SI9112DEMOBOARD Price
The second method is to vary the input power level. Though this can be done with a simple attenuator between the driver amp and the PA, the response is very non-linear, as the PA must first come out of saturation before the output power can change. Once out of saturation, the first stage is class A biased which means that the drain current is constant regardless of power settings. The addition of an attenuator also adds to the expense of the parts list and to the board size equation, and increases the insertion loss the driver amp must overcome.
SI9112-DEMOBOARD SI9112-DEMOBOARD SI9112DEMOBOARD on stock

ltem Symbol Condif ions Min Typ Max Unit
Forward voltage VF I F=50mA 1 5 2.0 V
Reverse current IR VR=5V 1 0 A
Peak emission wavelength Ap I F=50mA 880 nm
)bSpectral bandwidth ^ I F=50mA 50 nm
Radiant intensity Po I F=50mA 7 6 mW
Half angle ±30


·75 ·80 ·1H ·1L ·10
Parameter Symbol Min Max Min Max Min Max Min Max Min Max Unit Note
CAS latency=3 7 5 8 10 10 10
CLK cycle time CAS latency=2 tcc 1000 1000 10 1000 12 1000 13 1000 ns 1
CLK to valid CAS latency=3 5 4 6 6 6 7
output delay CAS latency=2 tSAC 6 7 7 ns 1 2
Output data CAS latency=3 2 7 3 3 3 3
hold time CAS latency=2 tOH 3 3 3 ns 2
CLK high pulse wid h tCH 2 5 3 3 3 3.5 ns 3
CLK low pulse width tCL 2 5 3 3 3 3.5 ns 3
Input setup time tss 1 5 2 2 2 2.5 ns 3
Input hold time tSH 0 8 1 1 1 1.5 ns 3
CLK to output in Low-Z tSLZ 1 1 1 1 1 ns 2
CLK to output CAS latency=3 5 4 6 6 6 7
in Hi-Z CAS latency=2 tSHZ 6 7 7 ns