Preconditioning ends and fast charging begins when the cell voltage exceeds the preconditioning threshold. Fast charge utilizes a foldback current scheme based on the voltage at the VSNS input developed by the drop across an external sense resistor, RSENSE, and the out- put voltage, VBAT. Fast charge continues until the cell voltage reaches the regulation voltage, VREG.
SI9123 on stock| VREF= VDD | | | |
| CODE | MIDSCA | LE | | | |
| | | vDD | = 5V | | |
| | | | | |
| | | | + | | |
| V | DD =3V | | | | |
| | + | | l | | |
| | | | | | |
| | | | | |
| | | VDD= 1.8V | |
| | | | | | |
| SYMBOL | PARAMETER | CONDITIONS | MIN | MAX | UNIT |
| VDS | drain-source voltage (DC) | | | 250 | V |
| VGSO | gate-source voltage (DC) | open drain | | +20 | V |
| ID | drain current (DC) | | | 310 | mA |
| IDM | peak drain current | | | 1.25 | A |
| Ptot | total power dissipation | Tamb " 25 IC; note 1 | | 1 | W |
| Tstg | storage temperature | | -55 | +150 | IC |
| Tj | junction temperature | | | 150 | ][C |
| | | | | |
