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SID15605D00B Datasheet

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TMC2072 Genlocking Video Digitizer The TMC2072 Genlocking Video Digitizer accepts analog composite data through the composite input BNC on the left side of the board. A 20MHz clock crystal provides the Gen- lock with an input clock. The TMC2072 0utputs horizontal and vertical syncs, and a 27MHz clock. The clock is used to drive the Decoder and EPLD. Like the TMC22x5yA, the Genlock part must be programmed at startup. Instructions on how to do this are in the "Microcontroller" section ofthis documentation.
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Light load efficiency is improved by a fully programmable standby mode, in which the quiescent current consumption of the controller is significantly re- duced. The reduction is achieved by disabling the MOSFET driver outputs and the internal oscillator when the controller has sensed that the the out- put load current has dropped a user programmable amount from full load. (continued)

TEST S1
tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open vcc GND vcc