| Parameter | Description | Condition | Min | Max | Unit |
| ECL Clock Outputs QA0:4),#),QB0:4),#) |
| VO(p_p) | Differential output voltage (peak-to-peak) | Differential PRBS fo < 50 MHz fo < 0.8 GHz fo < 1.0 GHz | 0.45 0.4 0.375 | | V |
| VMCR | Common Voltage Range | | Vcc-1.425 | V |
| tsk(o) | Output-to-output skew | 660-MHz 50% Duty Cycle Standard Load Differ- ential Operation | | 50 | ps |
| tsk(pp) | Output-to-output skew (part-to-part) | 660-MHz 50% Duty Cycle Standard Load Differ- ential Operation | | 500 | ps |
| tCCJ | Output cycle-to-cycle jitter (Intrinsic) | 660-MHz 50% Duty Cycle Standard Load Differ- ential Operation | BD | TBD | ps |
| tsk(p) | Output pulse skew [i3] | 660-MHz 50% Duty Cycle Standard Load Differ- ential Operation | TBD | TBD | ps |
| TRTF | Output Rise/Fall time | 660-MHz 50% Duty Cycle Differential20% t0 80% | | 0.3 | ns |
| TTB | Total Timing Budget | 660-MHz 50% Duty Cycle Standard Load | TBD | TBD | ps |
| DJ | Deterministic/lntrinsic Jitter | 660-MHz 50% Duty Cycle Standard Load | | 10 | ps rmS |
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