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SIL16CT64 Datasheet

Please adjust haIIAmp input bias voltage by value of Rl, R2 so that hall signal contains amplitude, input within range OV~ (Vcc-2.8V). In case Vcc noise influence the hall signal by board wiring pattem, please connect capacitor Cl like above figure. In the case oflong board wiring pattem from hall element to hall signalinput terminal, please connect capacitor C2 like above figure.
SIL16CT64 Price

					Rating
Parameter		Sym- bol	Pin No.	Conditions	Min	Typ	Max	Unit
	Input oset voltage	Vio	7,8 13, 14	FBl=FB2 =2 V		1	5	mV
	Input bias current	lB	7,8 13, 14		-100	-30		nA
	Voltage gain	Av	6. 15	DC		100*		dB
5-1.	Frequency bandwidth	BW	6. 15	Av =0 dB		2*		MHz
Error amplifier		VFBH	6. 15		4.7	4g		V
block [Error Ampl,	Output voltage	VFBL	6. 15			20	200	mV
Error Amp2]	Output source current	ISOURCE	6. 15	FBl=FB2 =2 V		-2	1	mA
	Output sink current	ISINK	6. 15	FBl=FB2 =2 V	1 50	300		cCA
	OUTD terminal output leak current	ILEAK	9	OUTD=17V		0	1	cCA
	OUTD terminal output ON resistor	RON	g	OUTD=1 mA		35	50	l
	Input oset current	Vio	10,1 1	+INC = -INC = 3 V to Vcc	-3		+3	mV
		I+INcH	1 1	+INC = 3 V to Vcc, in = -100 mV		20	30	cCA
		l-INCH	1 0	+INC = 3 V to Vcc, in = -100 mV		0.1	0.2	cCA
	Input current	I+INCL	1 1	+INC = 0 V, in = -100 mV	-180	-120
6.	Input current	l-INCL	1 0	+INC = 0 V, in = -100 mV	-195	-130
Current detection		VOUTC1	12	+INC = 3 V to Vcc, in = -100 mV	1.9	2.0	2.1	V
amplifier block [Current Amp]	Current detection	VOUTC2	12	+INC = 3 V to Vcc, in = -20 mV	0.34	0.40	0.46	V
	voltage	VOUTC3	12	+INC = 0 V t0 3 V, in = -100 mV	1.8	2.0	2.2	V
	voltage	VOUTC4	12	+INC = 0 V t0 3 V, in = -20 mV	0.2	0.4	0.6	V
	In-phase input voltage range	VCM	10,1 1		0		Vcc	V
	Voltage gain	Av	12	+INC = 3 V to Vcc, in = -100 mV	1 9	20	21	VN

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