| Pin Name | Pin Function |
| l/00l/07 | DATAINPUTS/OUTPUTS The l/0 pins are used to input command, address and data, and to output data during read operations. The Il 0 pins float to high-z when the chip is deselected or when the outputs are disabled. |
| CLE | COMMAND LATCH ENABLE The CLE input controls the activating path for commands sent to the command register. When active high, commands are latched into the command register through the l/0 ports on the rising edge of the WE signal. |
| ALE | ADDRESS LATCH ENABLE The ALE input controls the activating path for address to the internal address registers. Addresses are latched on the rising edge of WE with ALE high. |
| CE | CHIP ENABLE The CE input is the device selection control. When the device is in the Busy state, CE high is ignored, and the device does not return to standby mode in program or erase operation. Regarding CE control during read operation, refer to 'Page read' section of Device operation . |
| RE | READ ENABLE The RE input is the serial data-out control, and when active drives the data onto the l/0 bus. Data is valid tREA after the falling edge of RE which also increments the internal column address counter by one. |
| WE | WRITE ENABLE The WE input controls writes to the l/0 port. Commands, address and data are latched on the rising edge of the WE pulse. |
| WP | WRITE PROTECT The WP pin provides inadvertent write/erase protection during power transitions. The internal high voltage generator is reset when the WP pin is active low. |
| R/B | READY/BUSY OUTPUT The R/B output indicates the status of the device operation. When low, it indicates that a program, erase or random read operation is in process and returns to high state upon completion. It is an open drain output and does not float to high-z condition when the chip is deselected or when outputs are disabled. |
| Vcco | OUTPUT BUFFER POWER Vcca is the power supply for Output Buffer. Vcca is internally connected to Vcc, thus should be biased to Vcc. |
| Vcc | POWER Vcc is the power supply for device. |
| Vss | GROUND |
| NC | NO CONNECTION Lead is not internally connected. |
| GND | GND INPUT FOR ENABLING SPARE AREA To do sequential read mode including spare area , connect this input pin to Vss or set to static low state or to do sequential read mode excluding spare area , connect this input pin to Vcc or set to static high state |
| DNU | DO NOT USE Leave it disconnected. |
| |
Information in this document is provided in connection with Conexant Systems, Inc. ("Conexant") products. These materials are provided by Conexant as a service to its customers and may be used for informational purposes only. Conexant assumes no responsibility for errors or omissions in these materials. Conexant may make changes to specifications and product descriptions at any time, without notice. Conexant makes no commitment to update the information contained herein. Conexant shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions.
| Parameter | Symbol | Values | Unit |
| Forward current | IF | 50 | mA |
| Reverse voltage | | | V |
| Operating and storage temperature | Tstg | - 40]+85 | aC |
| Max. radiant power into the opt. port (VR = 5 V) | cDport | 1 | mW |
| Soldering time (wave / dip soldering), distance between solder point and baseplate (> 2 mm, 260 aC) | ts | 1 0 | S |
| | | |
