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SIP12201 Datasheet

RATING SYMBOL VALUE UNIT
Collector-base voltage (IE = 0) BD895 BD897 BD899 BD901 VCBO 45 60 80 100 V
Collector-emitter voltage (lB = 0) BD895 BD897 BD899 BD901 VCEO 45 60 80 100 V
Base-emitter voltage VEBO 5 V
Continuous collector current lc 8 A
Continuous base current lB 0 3 A
Continuous device dissipation at (or below) 250C case temperature (see Note l) Ptot 70 W
Continuous device dissipation at (or below) 25'C free air temperature (see Note 2) Ptot 2 W
Operating free-air temperature range -65 to +150 Qc
Operating junction temperature range Ti -65 to +150 oc
Storage temperature range Tstg -65 to +150 oC


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This can be a problem if RXDATA is driving a circuit that must "sleep" when data is not present to conserve power, or when it its necessary to minimize false interrupts to a multitasking processor. In this case, noise can be greatly reduced by increasing the thresh- old level, but at the expense of sensitivity. The best 3 dB bandwidth for the low-pass filter is also affected by the threshold level setting of DSl. The bandwidth must be increased as the threshold is in- creased to minimize data pulse-width variations with signal ampli- tude.
SIP12201 on stock
The DS1672 low-voltage serial timekeeping chip incorporates a 32-bit counter and power-monitoring functions. The 32-bit counter is designed to count seconds and can be used to derive time-of-day, week, month, month, and year by using a software algorithm. A precision, temperature-compensated reference and comparator circuit monitors the status of Vcc. When an out-of-tolerance condition occurs, an internal power-fail signal is generated that forces the reset to the active state. When Vcc returns to an in-tolerance condition, the reset signal is kept in the active state for 250ms to allow the power supply and processor to stabilize.

PIN NO. COORDINATE SYMBOL IO SYMBOL DESCRIPTION
1 2B MEMCKEi 108 SDRAM clock enable, Block 1
2 2C MEMCKE2 108 SDRAM clock enable, Block 2/GI016
3 1B MEMCKE3 108 SDRAM clock enable, Block 3/GI017
4 3D MEMCSOZ 108 SDRAM chip select, Block 0
5 2D MEMCS12 108 SDRAM chip select, Block 1
6 1C MEMCS22 108 16-bit data mode : SDRAM chip select, Block 2 32-bit data mode : Control MEMDis to MEMD8 0f SDRAM
7 3E DVDD Power supply (+3.3 V)
8 1D MEMCS32 108 16-bit data mode : SDRAM chip select, Block 3 32-bit data mode : Control MEMD7 to MEMDo of SDRAM
9 2E DGND Ground
10 4E MEMDo 1012U
1 1 5E MEMD1 1012U Data l/0 for SDRAM/flash memory/external device
12 4F MEMD2 1012U
13 1E DVDD2 Internal power supply (+2.5 V)
14 2F MEMD3 1012U Data l/0 for SDRAM/flash memory/external device
15 3F DGND Ground
16 5F MEMD4 1012U
17 5G MEMDs 1012U Data l/0 for SDRAM/flash memory/external device
18 4G MEMD6 1012U
19 1F DVDD Power supply (+3.3 V)
20 2G MEMD7 1012U Data l/0 for SDRAM/flash memory/external device
21 3G DGND Ground
22 6G MEMD8 1012U
23 5H MEMD9 1012U
24 4H MEMDio 1012U Data l/0 for SDRAM/flash memory/external device
25 1G MEMDii 1012U
26 3H DGND Ground
27 2H MEMD12 1012U
28 6H MEMD13 1012U Data l/0 for SDRAM/flash memory/external device
29 1H DVDD Power supply (+3.3 V)
30 5J MEMD14 1012U
31 4J MEMDis 1012U Data l/0 for SDRAM/flash memory/external device
32 2J TEST12 IU Test (Must be open.)
33 3J DGND Ground
34 6J MEMD16 1012U Data l/0 for SDRAM/external device/Gl016
35 1J TEST22 IU
36 6K TEST32 IU Test (Must be open.)
37 4K MEMD17 1012U Data l/0 for SDRAM/external device/Gl017
38 2K MEMD18 1012U Data l/0 for SDRAM/external device/GI018
39 3K MEMD19 1012U Data l/0 for SDRAM/external device/GI019