GND VDDQ VDDQ GND GND GND VDDQ Q2 Q2 GND VDDQ Q3 Q3 VDDQ GND Q4 Q4 VDDQ VDDQ GND GND VDDQ GND TxS
these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150IC. The device is automatically restarted when the chip temperature falls below 135IC. - STATUS FEEDBACK: in the case ofan overtemperature fault condition, a status feedback is provided through the INPUT pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of iool . The failure can be detected by monitoring the voltage at the INPUT pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(ON.
| | VcF= OV Te = 2b'C | | | | |
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| | | | Collector current IL (A) | ton, tstg, tf -lC Safety operation area-forward bias (ASO) | | |
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