TIMap-1194  > SN74ALS323N
description IC REGISTER SHIFT/STORAGE 20-DIP
Technical/Catalog Information SN74ALS323N
Vendor Texas Instruments
Category Integrated Circuits (ICs)
RoHS Status RoHS Compliant
Other Names SN74ALS323N SN74ALS323N
Lead Free Status Lead Free
Mounting Type Through Hole
Packaging Tube
Operating Temperature 0°C ~ 70°C
Package / Case 20-DIP (300 mil)
Voltage - Supply 4.5 V ~ 5.5 V
Logic Type Register, Multiplexed
Function Universal
Number of Elements 1 - Single
Number of Bits per Element 8
Output Type Standard

suppliers of SN74ALS323N and PDF data of SN74ALS323N

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  
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SN74ALS323N Datasheet

Symbol Parameter Test Conditions Min Typ. Max Unit
% Output Voltage 7.15 7.5 7.9 v
% Output Voltage lo = 1 A Vi = 9.5 V 7.1 7.5 7.95 v
o Line Regulation Vi = 9.5 t0 25 V Vi = 10.5 t0 20 V 120 60 mV mV
Vo Load Regulation lo = 20 mA t0 1.5 A lo = 2A 100 140 mV
Id Quiescent Current 8 mA
ad Quiescent Current Change lo = 20 mA t0 1A O5 mA
gd Quiescent Current Change lo = 20 mA Vi = 9.5 t0 25 V 1.3 mA
Vo T Output Voltage Drift lo = 5 mA Tj = 0 t0 70 0C -0.8 mvPc
eN Output Noise Voltage B = 10Hz t0 100KHz 52
SVR Supply Voltage Rejection f= 120 Hz 48 dB
Vi Operating Input Voltage lo1.5 A 10.5 v
Ro Output Resistance f= 1KHz 16 ml
lsc Short Circuit Current Vi= 27 V 500 mA
lscp Short Circuit Peack Current 3 A


SN74ALS323N Price

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40 050 80_ 1 1


SN74ALS323N on stock

Pin Name I/O Options Description
PAO/BZ PAl/BZ PA2 PA3/PFD PA4~PA7 1/0 Wake-up Pull-high or None CMOS or NMOS PAO~PA7 constitute an 8-bit bidirectional input/output port with Schmitt trig- ger input capability. Each bit on port can be configured as wake-up input by options. PAO~PA3 can be configured as CMOS output or NMOS input/out- put with or without pull-high resistor by options. PA4~PA7 are always pull-high NMOS input/output. Of the eight bits, PAO~PAl can be set as l/0 pins or buzzer outputs by options. PA3 can be set as an l/0 pin or as a PFD output also by options.
PBO/INTO PBl/INT1 PB2/TMRO PB3/TMR1 PB4~PB7 I PBO~PB7 constitute an 8-bit Schmitt trigger input port. Each bit on port are with pull-high resistor. Of the eight bits, PBO and PBl can be set as input pins or as external interrupt control pins (INTO) and (INTl) respectively, by software application. PB2 and PB3 can be set as input pin or as timer/event counter input pin TMRO and TMRl also by software application.
PCO~PC3 1/0 Pull-high or None CMOS or NMOS PCO~PC3 constitute a 4-bit bidirectional input/output port with Schmitt trig- ger input capability. On the port, such can be configured as CMOS output or NMOS inpuVoutput with or without pull-high resistor by options.
VSS Negative power supply, ground
V2 l LCD power supply for HT49C50L Voltage pump for HT49R50A-1/HT49C50-1.
VLCD l Voltage pump for HT49C50L. LCD power supply for HT49R50A-1/HT49C50-1.
V1C1C2 l Voltage pump
SEG32/COM3 COM2~COMO O 1/2, 1/3 0r 1/4 Duty SEG32 can be set as a segment or as a common output driver for LCD panel by options. COM2~COMO are outputs for LCD panel plate.
SEG31~SEGO O LCD driver outputs for LCD panel segments
OSC4 OSC3 O l RTC or System Clock Real time clock oscillators. OSC3 and OSC4 are connected to a 32768Hz crystal oscillator for timing purposes or to a system clock source (depend- ing on the options). No built-in capacitor
VDD Positive power supply
OSC2 OSC1 O l Crystal or RC OSCl and OSC2 are connected to an RC network or a crystal (by options) for the internal system clock. In the case of RC operation, OSC2 is the out- put terminal for l/4 system clock. The system clock may come from the RTC oscillator. Ifthe system clock co- mes from RTCOSC, these two pins can be floating.
RES l Schmitt trigger reset input, active low


Symbol Conditions 2SC4296 Unit
ICBO VCB=500V 100max
IEBO VEB=IOV 100max
V(BR)CEO lc=25mA 400min v
hFE VCE=4V, lc=6A 10 t0 30
VCE(sat) lc=6A, IB=1.2A 0.5max v
VBE(sat) lc=6A, IB=1.2A 1.3max v
fT VCE=12V, IE=-0.7A 10typ MHz
COB VCB=10V, f=lMHz 85typ pF


The device uses a 3-wire serial interface, which oper- ates at clock rates up t0 25MHz and is compatible with SPITM, QSPITM, and MICROWIRETM interface standards. The serial input shift register is 16 bits long and con- sists of 8 bits of DAC input data and 8 bits for DAC selection and shutdown control. DAC registers can be loaded independently or in parallel at the positive edge of CS.