TIMap-1085  > SN75LVDS389DBTR
description IC 8-CH HS DIFF DRIVER 38TSSOP
Technical/Catalog Information SN75LVDS389DBTR
Vendor Texas Instruments
Category Integrated Circuits (ICs)
RoHS Status RoHS Compliant
Other Names SN75LVDS389DBTR SN75LVDS389DBTR
Lead Free Status Lead Free
Type Line Transceiver
Packaging Tape & Reel (TR)
Package / Case 38-TSSOP
Voltage - Supply 3 V ~ 3.6 V
Number of Drivers/Receivers 8/0
Protocol RS644

suppliers of SN75LVDS389DBTR and PDF data of SN75LVDS389DBTR

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  
SN75LVDS389DBTR TI    04+  SSOP  2000 


SN75LVDS389DBTR ?TEXAS  ?SSOP  09+  现货热卖,全新原装,欢迎来电  5180 
SN75LVDS389DBTR TI/BB    08+  New  8500 
    SHENZHEN GAOHANG TECHNOLOGY CO..
  • Contact:lin
  • Tel:86-755-82727788
  • Fax:86-755-82727688
  • Email: weifengic@163.com
SN75LVDS389DBTR TI  38-TSSOP  07+  ★全新 ㊣原装 ▲现货  4000 
    Shenzhen City Qing Teng Techno..
  • Contact:xiaojun
  • Tel:86-755-83993047/83243427
  • Fax:755-82865013
  • Email: qtkj2001@163.com
SN75LVDS389DBTR TI  SSOP  04+    650 
    H.K. Shu Yang Electronic Co
  • Contact:Hu
  • Tel:86-755-83279520
  • Fax:
  • Email: sales6@sy-ic.cn
SN75LVDS389DBTR TI  SSOP  07+    5000 
    GuangHan Electronics Limited
  • Contact:Cindy
  • Tel:86-755-82533266
  • Fax:
  • Email: cindy@gh-elec.com
SN75LVDS389DBTR TI  SMD  05+    2500 
SN75LVDS389DBTR TI    04+    1900 
SN75LVDS389DBTR 162    0316+    TEXAS 
    Apex Technology Co.,Ltd
  • Contact:JOJO
  • Tel:86-755-61685989
  • Fax:
  • Email: jojo@szchip.com
SN75LVDS389DBTR TI    04+    1900 
    All Element Technology Co.,Ltd
  • Contact:lisa
  • Tel:86-755-82565926
  • Fax:86-755-82565338
  • Email: lisa@allelement.net
SN75LVDS389DBTR TI      1450 
    E-Zone International (HK) Co.,..
  • Contact:Ella
  • Tel:86-755-8339-1755, 8326-7835
  • Fax:86-755-8339-1772
  • Email: sales1@ez-international.cn
SN75LVDS389DBTR TI    04+    1900  
    All Element Technology co.,ltd
  • Contact:mr
  • Tel:86-755-82565936
  • Fax::+86-755-82565338
  • Email: sales@allelement.net
SN75LVDS389DBTR TI        1680 
    HongKongParkeliUnitedDevelopme..
  • Contact:Ms.cindywei
  • Tel:86-0755-83995476
  • Fax:86-0755-83995517
  • Email: yan@parkeli.com
SN75LVDS389DBTR TI    07+    1500 
    MAGNIFICENTELECTRONICSCO.,LTD
  • Contact:Mr.coreylin
  • Tel:86-755-21912432
  • Fax:86-755-82885203
  • Email: magnif@zj.com
SN75LVDS389DBTR TI  1450     
SN75LVDS389DBTR TEXAS  SSOP  03  XLL  324 
    Better(HK)Electronicsco.,LTD
  • Contact:Mr.clarkchen
  • Tel:86-754-86670783
  • Fax:86-754-82333372
  • Email: clark@better-ic.com

SN75LVDS389DBTR Datasheet

lr = 150A VCIN = OV
'i - Ld U -- - Ti = 1250C I I


SN75LVDS389DBTR Price
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Integrated Timers The Hyperstone El -32X has two hardware timers integrated with a common time base and a resolution of l IJs. The system timer is a general-purpose timer, which is strongly supported by Hyperstone's real-time operating system hyRI-K. In combination with hyRrK, the Hyperstone El-32X provides up t0 31 virtual timers in stack-level tasks and up t0 254 virtual timers in interrupt-level tasks. Depending on the work load of the CPl_I, the latency of these virtual timers is in the range of l ..5 ps. FYogramming of these timers is very easy because only the delay has to be defined. Very important is that none of these timers generates any overhead CR_I cycles for pending time events. A processing overhead of approximately l ps is required only when a timer event occurs. The other timer can be directly controlled by the user. The signals of this timer are directly accessible at one of the chip's I/O pins without any latency. It is synchronized to the clock. Among others, this timer is ideally suited for measuring pulse widths or generation of pulse sequences.
RESET A reset is accomplished by holding the RST pin high for at least two machine cycles (24 0scillator periods), while the oscillator is running To insure a good power-on reset, the RST pin must be high long enough to allow the oscillator time to start up (normally a few milliseconds) plus two machine cycles. At power-on, the voltage on Vcc and RST must come up at the same time for a proper start-up. Ports l, 2, and 3 will asynchronously be driven to their reset condition when a voltage above VIHl (min.) is applied to RESET.