TIMap-352  > SR151C221KAR
description CAP CER 220PF 100V 10% X7R RAD
Technical/Catalog Information SR151C221KAR
Vendor AVX Corporation
Category Capacitors
RoHS Status RoHS Compliant
Other Names SR151C221KAR SR151C221KAR
Features General Purpose
Lead Free Status Lead Free
Mounting Type Through Hole
Packaging Bulk
Operating Temperature -55掳C ~ 125掳C
Package / Case Radial
Tolerance 卤10%
Capacitance 220pF
Lead Spacing 0.1" (2.54mm)
Voltage - Rated 100V
Temperature Coefficient X7R

suppliers of SR151C221KAR and PDF data of SR151C221KAR

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  
SR151C221KAR AVX    07+  04 OEM STK  1000 
SR151C221KAR AVX    2009  original  12000 
    EAST WIN TECHNOLOGY(HK)ELECTRO..
  • Contact:Philip chen
  • Tel:852-27592923/0755-83226762/88820516
  • Fax:852-27592926/0755-82518619
  • Email: philip.chen@eastwinelec.com


SR151C221KAR AV    08+    12,000 
    ANTY Electronic Company
  • Contact:Mr AN
  • Tel:86-755-61352660/61
  • Fax:86-755-61352608
  • Email: maoyan_203@163.com


SR151C221KAR AVX        3,000 
    Andes Trading Company (BJ)
  • Contact:Helen
  • Tel:86-10-62102448
  • Fax:
  • Email: helen@andes-ic.com

SR151C221KAR Datasheet
( M / V u u ) A I I A I I I S N a s I N V I O V Z O O H I V O O I O H d
SR151C221KAR Price
*1 Pulse Measurement; PW " 350.s, Duty Cycle " 2 % *2 The emitter terminal and the case shall be connected to the guard terminal of the three-terminal capacitance bridge.
SR151C221KAR on stock
For the synchronous MOSFET Q2, Rdscon; is an im- portant characteristic; however, once again the im- portance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the con- trol lC so the gate drive losses become much more significant. Secondly, the output charge Qu;; and re- u oss verse recovery charge Qrr both generate losses that u rr are transfered to Ql and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs' susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions be- tween ground and V .As Ql turns on and off there is in a rate of change of drain voltage dV/dt which is ca- pacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgsl must be minimized to reduce the potential for Cdv/dt turn on.
The LTC1731-4.2 can be forced into shutdown by float- ing the PROG pin and allowing the internal 2.5~A current source to pull the pin above the 2.457V shutdown
td: Delay time tr : Rise time (time for output current to rise from 10% t0 90% of peak current) tf : Fall time (time for output current to fall from 90% t0 10% of peak current)