STC102B Datasheet| Bit | @Pup | Name | Description | | 7 | 1 | RESERVED | RESERVED | | 6 | 1 | DOT 96T/C | DOT_96 MHz Output Enable 0 = Disable (Hi-Z), 1 = Enabled | | 5 | 1 | USB_48 | USB_48 MHz Output Enable 0 = Disabled, 1 = Enabled | | 4 | 1 | REFO | REFO Output Enable 0 = Disabled, 1 = Enabled | | 3 | 1 | REF1 | REFl Output Enable 0 = Disabled, 1 = Enabled | | 2 | 1 | CPU[T/C]1 | CPU[T/C]1 0utput Enable 0 = Disable (Hi-Z), 1 = Enabled | | 1 | 1 | CPU[T/C]O | CPU[T/C]O Output Enable 0 = Disable (Hi-Z), 1 = Enabled | | 0 | 0 | CPUT/C SRCT/C PCIF PCI | Spread Spectrum Enable 0 = Spread off, 1 = Spread on | | | | |
STC102B Price Figure 27 shows the simplified schematic for a single amplifier. The amplifier contains a Butler Amplifier at the input. This front-end design uses both bipolar and MOSFET transistors in the differentialinput stage. The bipolar devices, Ql and Q2, improve the offset voltage and achieve the low noise perfor- mance, while the MOS devices, Ml and M2, are used to obtain higher slew rates. The bipolar differential pair is biased with a proportional-to-absolute-temperature (PTAT) bias source, IBl, while the MOS differential pair is biased with a non-PTAT source, IB2. This results in the amplifier having a constant gain- bandwidth product and a constant slew rate over temperature. STC102B on stock| PARAMETER ' SYMBOL | MIN TYP MAX %UNl | CONDITlO~xiS | | Forward Voltage : VF Reverse Breakdown Voltage , BVR Luinirious iclcensity ; IV ?eak Wavelengh , xp Spectral Line Half Wi th ! A;L | 3 V 5 V 3.5 5 : mcd 640 . nm 40 ; nm | IF -20mA IR= 2A lF-20mA lF-20mA IF-20mA | | | |
|
