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STC12C(LE)2052AD-35C-TSSOP Datasheet
latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs in true form, according to the function table. When LE is low, the outputs are latched. When the clear (CLR) input goes low, the Q outputs go low independently of LE. The outputs are in the high-impedance state when the output-enable (OE) input is at a high logic level.
STC12C(LE)2052AD-35C-TSSOP Price

Sinusoidal conduction Rectangular conduction
Conduction angle Single Side Double Side Single Side Double Side U nits Conditions
1800 0.002 0.002 0.001 0.001
1200 0.002 0.002 0.002 0.002
900 0.003 0.003 0.003 0.003 K/W Tj= Tj max.
600 0.004 0.004 0.004 0.004
300 0.007 0.007 0.007 0.007


STC12C(LE)2052AD-35C-TSSOP on stock
NOTES: 1. This value applies for tp i 0.3 ms, duty cycle < 10%. 2. Derate linearly t0 1500C case temperature at the rate of 0.72 W/oC. 3. Derate linearly t0 1500C free air temperature at the rate of 16 mW/oC. 4. This rating is based on the capability of the transistor to operate safely in a circuit of: L = 20 mH, IB(on) = -0.4 A, RBE = 100 Q, VBE(off) = 0, Rs = 0.1 Q, Vcc = -20 V.

K9FIG08QOA K9FIG08UOA
Parameter Symbol Test Conditions 1.8V 3.3V Unit
Min Typ Max Min Typ Max
Operating Page Read with Serial Access lccl tRC=50ns, CE=ViL IOUT=OmA 10 20 15 30
Current Program lcc2 10 20 15 30 mA
Erase lcc3 10 20 15 30
Stand-by Current(TTL) ISB1 CE=VIH, WP=OVNcc 1 1
Stand-by Current(CMOS) ISB2 CE=Vcc-0.2, WP=OVcc 10 50 10 50
Input Leakage Current h_l VIN=O to Vcc(max) ±10 ±10 uA
Output Leakage Current ILO VOUT=O to Vcc(max) ±10 ±10
Input High Voltage VIHt 0.8xVcc Vcc +0.3 0.8xVcc Vcc +0.3 V
Input Low Voltage, All inputs VIL* -0.3 0.2xVcc -0.3 0.2xVcc
Output High Voltage Level VOH K9FIG08QOA :IOH=-lOOyA K9FIG08UOA :IOH=-400yA Vcc -0.1 2.4
Output Low Voltage Level VOL K9FIG08QOA :IOL=lOOuA K9FIG08UOA :IOL=2.1mA 0 1 0 4
Output Low Current(R/B) IoL(R/B) K9FIG08QOA :VOL=O.1V K9FIG08UOA :VOL=0.4V 3 4 8 10 mA