complex logic functions easily and efficiently. Multiple levels of combinatorial logic can always be reduced to sum-of-products form, taking advantage of the very wide input gates available in PAL devices. The equa- tions are programmed into the device through floating- gate cells in the AND logic array that can be erased electrically. The fixed OR array allows up to eightdata product terms peroutput forlogic functions. The sum of these products feeds the output macrocell. Each macrocell can be programmed as registered or combinatorial with an active-high or active-low output. The output configura- tion is determined by two global bits and one local bit controlling four multiplexers in each macrocell.
STK2118B Price| | | | | | j | | | | 1- |
| | | | | | | L | | 2 | |
| | | | j | | | 4. | 3 L | | |
| | | | | | | | | -_ | |
| NUMBER OF OUTPU- CONDUCTlh | 'S | | | | | |
| SIMULTANEOUSLY | l TA= +700C l |
| | | | | | | RA= 600C/W | | |
| | | |
| | | | | | | | | | |
STK2118B on stock| | Parameter | Max | Units Conditions |
| VFM | Max. Forward voltage drop | 0.57 | V | If = 3.0, Tj = 250C |
| O77 | If = 6.0, Tj = 250C |
| 0.52 | If = 3.0, Tj = 1250C |
| 0.79 | If = 6.0, Tj = 1250C |
| I rm | Max. Reverse Leakage current | O30 | mA | Vr = 30V I Tj = 250C |
| 37 | I Tj = 1250C |
| Ct | Max. Junction Capacitance | 310 | pF | Vr = 5Vdc (100kHz t0 1 MHz) 250C |
| dv/dt | Max. Voltage Rate of Charge | 4900 | V/lis | Rated Vr |
| | | | |
| Parameter | Description | Typ. | Max | Unit |
| CIN | InputCapacitance | 2.5 | 3 | pF |
| COUT | OutputCapacitance | | | pF |
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