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STK405050A Datasheet

SYMBOL PARAMETER MIN MAX UNIT
VDD digital supply voltage -0.3 +5.5 V
Vcc analog supply voltage -0.3 +5.5 V
q;VCC-VDD difference in voltage between Vcc and VDD -0.3 +5.5 V
Vn voltage at pins l, 6, 8, 9, 11 t0 14 and 20 -0.3 VDD+ 0.3 V
V2,3 voltage at pins 2 and 3 -0.3 Vcc+ 0.3 V
q;VGND difference in voltage between AGND and DGND (these pins should be connected together) -0.3 +0.3 V
Ptot total power dissipation 150 mW
Tstg storage temperature -55 +125 1[C
Tamb operating ambient temperature -30 +85 ][C
Tj maximum junction temperature 95 ][C


STK405050A Price
Supply Voltage - 240 vAC/50 Hz 10 VA MAX Dimenslons Width T40 mm Length 180 mm Height 65 mm YVeight I kg - Ring Voltage - Variable 0-80 vAC 50 Hz Cadance on .4 secs 072 secs on .4 secs off 2 secs Line Voltage 35 vDC 120 Ma MAX Speech ouput int0 600fl - 10 dBm (AvJ MAX ringing drlve toad l.5 Kfl @ 75V 50 Hz
STK405050A on stock
Best range is achieved with either a straight piece of wire, rod or PCB track @ 1/4 wavelength (15.5cm @ 433.92MHz). Further range may be achieved if the l/4 wave antenna is placed perpendicular in the middle of a solid earth plane measuring at least 16cm radius. In this case, the antenna should be connected to the module via some 50 0hm characteristic impedance coax
Stop Condition . . . Acknowledge Bit (ACK) . . . Data Input . . . . . . Memory Addressing. . . . . . Table 3. Operating Modes. . . . . . . Figure 6. Write Mode Sequences, to Addresses in the Top Half, with WC=1 (data write Write Operations . . . . . . . . Byte Write . . . . . . Page Write. . . . . . Figure 7. Write Mode Sequences with WC=O (data write enabled). . . . . . . . . Figure 8. Write Cycle Polling Flowchart using ACK. . . . . . . . Minimizing System Delays by Polling On ACK . . . . Figure 9. Read Mode Sequences . . . . . . . . Read Operations . . . . . . . . Random Address Read . . . Current Address Read. . . . Sequential Read . . . . . . . . Acknowledge in Read Mode . . . . .