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STK411230E Datasheet

					Ta=25			Ta=-4085
PARAMETER	SYMBOL	CL	vcc(v)		MIN	TYP	MAX	MIN	MAX	UNITS
			3 3			3 7	7 9	1	9 5
		15pF	5 0			2 7	5 5	1	6 5	ns
	tPLH		3 3			5 4	11 4	1	13
	tPLH	50pF	5 0			3 6	7 5	1	8 5	ns
Propagation Delay Time			3 3			3 3	7 9	1	9 5
		15pF	5 0			2 5	5 5	1	6 5	ns
	tPHL		3 3			4 6	11 4	1	13
	tPHL	50pF	5 0			3 5	7.5	1	8 5	ns
Input Capacitance	CIN		5 0	VIN=VCC or GND		2	10		10	pF
Power Dissipation Capacitance	Cpd	No Load, f=lMHz				9 3				pF

STK411230E Price

1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at condi- tions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Mounted on a demo board. 3. To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN > 2.5V.
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Connecting a capacitor, CNR, from the Noise-Reduction (NR) pin to ground can reduce the output noise voltage. Adding CNR, as shown in Figure 5, forms a low-pass filter for the voltage reference. For CNR = lOnF, the total noise in the 10Hz to lOOkHz bandwidth is reduced by approximately a factor of 3.5. This noise reduction effect is shown in Figure 6.

l l m - H C c - ) C q b e 6 s h O ' u m 8 m e m ( J o e A ¨ i e m 6 k a

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