| PARAMETER | SYMBOL | MIN | TYP | MAX | UNITS | TEST CONDITIONS | NOTE |
| Supply Current 4N51 4N52 4N54 | lcc | | 112 112 112 | 170 170 170 | mA | Vcc = 5.5V Numeral 5 and DP lighted | 1 |
| Power Dissipation 4N51 4N52 4N53 4N54 | PT | | 560 560 280 560 | 935 935 320 935 | mW | Vcc = 5.5V Numeral 5 and DP lighted | 1 4 |
| Luminous Intensity per LED 4N51 4N52 4N53 4N54 | IV | 40 40 45 40 | 85 85 85 85 | | uCd | Vcc = 5V, TA = 25'C V cc = 5V, TA = 25'C IF = 10mA, A= 25'C V cc = 5V, A = 250C | 2 |
| Forward Voltage per LED 4N53 | VF | | 1.6 | 2.0 | v | IF= 10mA | |
| Logic Low-Level Input Voltage 4N51 4N52 4N54 | VIL | | | 0.8 0.8 0.8 | V | Vcc= 4.5V | |
| Logic Low-Level Input Voltage 4N51 4N52 4N54 | VIH | 2 2 2 | | | V | Vcc= 4.5V | |
| Enable Low-Voltage; Data Being Entered 4N51 4N52 4N54 | VEL | | | 0.8 0.8 0.8 | V | V cc= 4.5V | |
| Enable High-Voltage; data not being entered 4N51 4N52 4N54 | VEH | 2 2 2 | | | v | V cc= 4.5V | |
| Blanking Low-Voltage display not blanked 4N54 | VBL | | | 0.8 | V | V cc= 4.5V | |
| Blanking High-Voltage display blanked 4N54 | VBH | 3.5 | | | V | V cc= 4.5V | |
| Leak Rate ALL | | | | 5x10'8 | | cc/sec | |
| Blanking Low-Level Input Current 4N54 | IBL | | | 50 | mA | V cc = 5.5V, VBL = 0.8V | |
| Blanking High-Level Input Current 4N54 | IBH | | | 1.0 | mA | V cc = 5.5V, VBH = 4.5V | |
| Logic Low-Level Input Current 4N51 4N52 4N54 | llL | | | -1.6 | mA | V cc = 5.5V, VIL = 0.4V | |
| Logic High-Level Input Current 4N51 4N52 4N54 | lIH | | | +100 | LIA | V cc = 5.5V, VIH = 2.4V | |
| Enable Low-Level Input Current 4N51 4N52 4N54 | lEL | | | -1.6 | mA | V cc = 5.5V, VEL = 0.4V | |
| Enable High-Level Input Current 4N51 4N52 4N54 | IEH | | | +130 | uA | V cc = 5.5V, VEH = 2.4V | |
| Wavelength at Peak Emission ALL | P | | 655 | | nm | tA= 25C | |
| Dominant Wavelength ALL | d | | 640 | | | tA= 25C | 3 |
| Forward Voltage per LED 4N53 | VF | | 1.6 | 2.0 | v | IF= 10mA | |
| Weight ALL | | | 1 | | gm | | |
| | | | | | | |
er blocks must be given within this delay. The input of a new Erase Confirm command will restart the timeout period. The status of the internal timer can be monitored through the level of DQ3, if DQ3 is '0' the Block Erase Command has been given and the timeout is running, if DQ3 is '1', the timeout has expired and the P/E.C. is erasing the block(s). If the second command given is not an erase con- firm or if the Coded cycles are wrong, the instruc- tion aborts, and the device is reset to Read Array. It is not necessary to program the block with OOh as the P/E.C. will do this automatically before to erasing to FFh. Read operations after the sixth ris- ing edge of W or EF output the Status Register bits.
Si9139DG-2818 on stock| rum-on -nme | Vcc= 60V,lc= 10A | t on | | 1.9 | us |
| Storage Time | IBl= 1.OA PW= 20 us | ts | | 1.5 | us |
| Fall Time | tt | | 0.5 | us |
| | | | | |
OPERATION The DS1668/DS1669 Dallastats are controlled through a contact closure input or by a digital source input. The DS1668 is configured to operate from a single contact closure (pushbutton) input which is integrated in the custom 6-pin package orthe device can be driven from the digital source input (D). The DS1669 can be con- trolled using a single pushbutton input, dual pushbutton, or using the digital source input.
