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Notes: * Post-radiation performance guaranteed at 250C per MIL-STD-883. 1. Under steady state (non-transient) conditions, IOL must be limited extemally as follows: Maximum IOL per port pin: lOmA Maximum IOL per 8-bit port- Port 0: 26mA Ports l, 2, & 3: 15mA Maximum total IOL for all output pins: 71mA IfIOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 2. Capacitive loading on ports o and 2 may cause spurious noise pulses to be superimposed on the VOL of ALE and ports I and 3. The noise is due to external bus capacitance discharging into the port o and port 2 pins when these pins make l to O transitions during bus operations. In applications where capacitance loading exceeds 100 pF, the noise pulse on the ALE may exceed 0.8V. In these cases, it may be desirable to qualify ALE with a schmitt trigger or use an address latch with a schmitt trigger strobe input. 3. Capacitive loading ports O and 2 cause the VOH on ALE and PSEN to drop below the VDD-0.3 specification when the address lines are stabilizing. 4. Capacitance measured for initial qualification or design changes which may affect the value.