TIMap-2  > TMS4C1060BN30

suppliers of TMS4C1060BN30 and PDF data of TMS4C1060BN30

Part Numbert Mfg Packt D/C Descriptiont Qty Company/Contact  

TMS4C1060BN30 Datasheet

SPECIFICATIONS (Tj = 250C UNLESS OTHERWISE NOTED)
Parameter Symbol Test Condition Min Typa Max Unit
Static
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 yA 60 V
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 yA 1 0 2 0 3 0
Gate-Body Leakage IGSS VDS = 0 V, VGS =20 V 100 nA
VDS = 48 V, VGS = 0 V 1
Zero Gate Voltage Drain Current IDSS VDS = 48 V, VGS = 0 V, Tj = 1250C 50 VA
VDS = 48 V, VGS = 0 V, Tj = 1750C 250
On-State Drain Currentb ID(on) VDS = 5 V, VGS = 10V 50 A
VGS = 10 V, ID = 20A 0 0074 0.0093 Q
VGS = 10 V, ID = 20 A, Tj = 1250C 0.016
l Drain-Sour.e On-State Resistanceb rDS(on) VGS = 10 V, ID = 20 A, Tj = 1750C 0.020
I VGS = 4.5 V, ID = 15A 0.0122
Forward Transconductanceb 9fs VDS = 15 V, ID = 20A s
Dynamic
Input Capacitance ciss 2650 pF
Output Capacitance coss VGS = 0 V, VDS = 25 V, f = 1 MHz 470
Reverse Transfer Capacitance Crss 225
Total Gate Chargec Qg 47 70
Gate-Source Chargec Qgs VDS = 30 V, VGS = 10 V, ID = 50A 10 nC
Gate-Drain Chargec Qgd 12
Turn-On Delay Timec td(on) 10 20
Rise Timec tr VDD = 30 V, RL = 0.6 Q 15 25
Turn-Off Delay Timec td(off) ID 50 A, VGEN = 10 V, RG = 2.5 Q 35 50 ns
Fall Timec tf 20 30
Source-Drain Diode Ratings and Characteristics (Tc = 250C)
Pulsed Current ISM 100 A
Diode Forward Voltage VSD IF = 20 A, VGS = OV 1 0 1.5 V
Reverse Recovery Time trr IF = 20 A, di/dt = 100 A/ys 45 100 ns


TMS4C1060BN30 Price
The RF receiver T5744 can be operated with and without a SAW front-end filter. In a typical automotive application, a SAW filter is used to achieve better selectivity. The selectivity with and without a SAW front-end filter is illustrated in Figure 7. Note that the mirror frequency is reduced by 40 dB. The plots are printed relatively to the maximum sensitivity. If a SAW filter is used, an insertion loss of about 4 dB must be considered.
TMS4C1060BN30 on stock

8:#;-111-
m
1.40 1.20 1 3 2 2.64 2.10
L +
D T l
5 7' r- ! --1 2. n j l. 03


BOARD LAYOUT Care must be taken in PCB layout to minimize power supply and ground noise. Analog ground (GNDA) of each filter should be connected to digital ground (GNDD) at a single point, which should be bypassed to both power supplies. Further power supply decoupling adjacent to each filter and CODEC is recommended. Ground loops should be avoided, both between GNDA and GNDD and between the GNDA traces of adjacent filters and CODECs.