| SYMBOL | PARAMETER | CONDITIONS | MIN | TYP. | MAX | UNIT |
| VDDD1 | supply voltage range (pin 12) | for digital part | 4.5 | 5 | 5 5 | V |
| VDDD2 | supply voltage range (pin 31) | for digital part | 4.5 | 5 | 5.5 | V |
| VDDA1 | supply voltage range (pin 32) | for butter of DAC 1 | 4.75 | 5 | 5.25 | V |
| VDDA2 | supply voltage range (pin 37) | tor buffer of DAC 2 | 4.75 | 5 | 5.25 | V |
| VDDA3 | supply voltage range (pin 40) | for buffer of DAC 3 | 475 | 5 | 5.25 | V |
| VDDA4 | supply voltage range (pin 42) | DAC reference voltage | 4.75 | 5 | 5.25 | V |
| IDDD | supply current (IDDDl + IDDD2) | for digital part | | tbf | tbf | mA |
| oDDA | supply current (IDDAl to IDDA4) | for DACs and buffers | | tbf | tbf | mA |
| YUV-bus inputs (pins 4 t0 11 and 14 t0 21) Figures 3 and 4 |
| VIL | input voltage LOW | | -0.5 | | 0.8 | V |
| VIH | input voltage HIGH | | 2.0 | -VDDD+0.5 | V |
| cI | input capacitance | Vl= HIGH | | | 10 | pF |
| ILI | input leakage current | | | | 4.5 | |
| Inputs MSl, MS2, MC, LLC, HREF and RESN (pins 22 t0 27) |
| VIL | input voltage LOW | | -0.5 | | 0.8 | V |
| VIH | input voltage HIGH | | 2.0 | VDDD+0.5 | V |
| CI | input capacitance | Vl= HIGH | | | 10 | pF |
| ILI | input leakage current | | | | 4.5 | yA |
| v24 | MC input voltage for LL27 CREF signal on MC input | 27 MHz data rate CREF data rate; note 1 | 2.0 | VDDD+0.5 l | V V |
| 12C.bus SCL and SDA (pins 28 and 29) |
| VIL | input voltage LOW | | -0.5 | | 1.5 | V |
| VIH | input voltage HIGH | | 3.0 | VDDD+0.5 | V |
| }I | input current | Vl= LOW or HIGH | | | +10 | ¨A |
| VOL | SDA output voltage LOW (pin 29) | 129 =3 mA | | | O4 | V |
| 129 | output current | during acknowledge | 3 | | | mA |
| Digital-to-analog converters (pins l, 2, 41, 42, 43 and 44) |
| VDAC | input reference voltage for internal resistor chains (pin 42) | | 4.75 | 5 | 5.25 | V |
| ICUR | input current (pin 41) | R41_42 = 15 kQ | | 300 | | uA |
| V1,44 | reference voltage LOW | pin connected to VSSA1 | | 0 | | V |
| cL | external blocking capacitor to VSSA1 for reference voltage HIGH (pins 2 and 43) | | | 0.1 | | ¨F |
| | | | | | |
Voltage-to-frequency converters can be used for full scale voltages of 100 mV or greater and full scale frequencies of l Hz t0 1 00 kHz. Input voltages in excess of Vcc+ can be accommodated with appropriate resistor dividers to attenuate the voltages. The following components selection guidelines should be used. 1. Rs should be approximately 14 kfl to optimize the system performance versus temperature. Rs is normally a 12 kfl fixed resistor and a 5 kfl pot to be used to adjust the full scale output frequency. Small variations in Rs have minimal effect on system temperature performance. IREF = VREF/RS = 1.95 \URs 2. Ro Co sets the one-shot pulse width, To = 1.1 Ro Co. This pulse width must be shorter than the minimum period of the maximum frequency ie, set it equal to .75 (l/fo). Therefore, Ro Co = .68 (1/fo). Values of Ro should be between 6.8 kfl and 680.kfl and Co should be from .O01 u.F t0 1 uF. 3. RB should be as low as possible for the highest accuracy, (this reduces the effect of current source ROUT) but must be large enough to insure that the current source output is greater than VIN maxlRB. Therefore, choose RB such that RB ~ 1.33 VIN max/lo. 4. CB for Figure 2 must be chosen t0 1rade-off between accuracy and response time. Larger val- ues of CB give greater system accuracy but response time is limited by the RB DB time con- stant. A good choice for DB is l0-2/f0. 5. Ci for Figures 3 and 4 can be selected depending on the output frequency. The smaller Ci is the faster the system response wil be. Ci must be large enough to limit the amplifier swing. The op amp will swing a voltage set by IoTo/Ci, so if the comparator is biased at 2/3 Vcc+ this constrains Ci > 3 IoTo/2 Vcc+. A nominal value of Ci = 5 x l0-5/fa meets this requirement. COMPARISON OF VOLTAGE TO FREQUENCY CIRCUITS
