| Part Numbert | Mfg | Packt | D/C | Descriptiont | Qty | Company/Contact |
TNED5080 Datasheet
TNED5080 Price
TNED5080 on stock Absolute Maximum Ratings Stress beyond the values stated below may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. Supply Voltage (VCC-VEE) .....-0.3 V t0 4.5 V Data/Control Input Levels(VlN)(1)' -0 5 V to VCC+0 5 V LVDS Input Differential Voltage (IVIDI)(2) 2 0 V Operating Case Temperature (TCASE)(3l OoC t0 800C Storage Ambient Temperature (TSTG) -200C t0 1000C Storage Moisture ...... ........ 20% t0 85% Soldering Conditions Temp/Time (TsoLD; tSOLD)(4) ....2600C/lOs ESD Resistance (all pins to VEE, human body model)(s)...... 1 kV Notes 1. At LVDS and LVCMOS inputs. 2. IVIDl=l(input voltage of non-inverted input minus input voltage of inverted input)l. 3. Measured at case temperature reference point (see dimensional d rawing). 4. Hot bar soldering. 5. To avoid electrostatic damage the handling precautions as for MOS devices must be taken into account. ality and operating modes. However, to meet the faster DDR333 0perating frequencies, some of the AC timing parameters are slightly tighter. This addendum data sheet will concentrate on the key differences required to support the enhanced speeds. In addition to the standard 66-pin TSOP package, a 60-ball FBGA package is utilized for DDR333. This JEDEC-defined package promotes better package para- sitic parameters and a smaller footprint. |
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