Each port has independent control pins; chip enable (CE), write enable (R/W), and output enable (OE). BUSY flags are provided on each port. In addition, an interrupt flag (INT) is provided on each port of the 52-pin PLCC version. BUSY signals that the port is trying to access the same location currently being accessed by the other port. On the PLCC version, INT is an interrupt flag indicating that data has been placed in a unique location (7FF for the left port and 7FE for the right port).
TNPW-08051G1DT9RT1 on stock| | | | | | | | Ti= 250C |
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| Symbol | Parameter | Conditions | Max | Unit |
| CIN | Input Capacitance | VIN= OV | 8 | pF |
| CouT{2) | Ouput Capacitance | VOUT= OV | 10.5 | pF |
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