In TV Output mode, multiplexed input data, sync and clock signals are input to the CH7012 from the graphics controller's digital output port. A P-OUT clock can be output as a frequency reference to the graphics controller, which is recommended to ensure accurate frequency generation. Horizontal and vertical sync signals are normally set to the CH7012 from the graphics controller, but can be output to the graphics controller as an option. Data will be 2X multiplexed, and the XCLK clock signal can be lX or 2X times the pixel rate. The input data will be encoded into the selected video standard, and output from the video DAC's. The modes supported for TV output are shown in the table below, and a block diagram of the CH7012 is shown on the following page.
| | | | f | || | VCE--3V |
| | | | - J J J | | | |
| | | | lJJ | | | |
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| | | ) 2 | 1 {o | | | |
| | | Jl | j | | | |
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| | l c) | BASE TO EMITTER VOLTAGE : veE (V) Figure 4 | COLLECTOR CURRENT:ic (mA) | Figure6 | _788 clqilLl?10 103 I | |
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